background image

If the above conditions are not satisfied, the inter-

nal reset circuit will not operate normally.  In such a
case, the LCD unit must be initialized by executing
a series of instructions (see the Execution by In-
structions section).

t

AS

PW

EH

t

DDR

t

cycE

t

AH

t

AH

V

OH

V

OL

DB

- DB

7

t

Ef

t

DHR

t

Er

V

IH

V

IL

E

V

IH

R/W

V

IH

V

IL

RS

VALID DATA

LCD27-25

Figure 6.  Read Operation Timing Diagram

(For data sent from the LCD unit to the external microprocessor)

3$5$0(7(5

6<0%2/

9$/8(

81,7

0,1

0$;

(QDEOH &\FOH 7LPH

W

F\F

(

QV

(QDEOH 3XOVH :LGWK +LJK /HYHO

3:

(+

QV

(QDEOH 5LVH)DOO 7LPH

W

(U

 W

(I

QV

6HWXS 7LPH

56 5:(

W

$6

QV

$ROG 7LPH

W

$+

QV

'DWD 'HOD\ 7LPH

W

''5

QV

'DWD +ROG 7LPH

W

2+5

QV

Table 10.  Read Operation Timing Characteristics

(V

DD

 = 5.0 

±

 5%, V

SS

 = 0 V, Ta = 0 ~ 50

°

C)

3$5$0(7(5

6<0%2/

9$/8(

81,7

0,1

7<3

0$;

9ROWDJH %XLOG8S 7LPH

W

UFF

PV

3RZHU2II 3HULRG

W

2))

PV

Table 11.  Power Conditions for Internal Reset

0.1 ms 

 

t

rCC 

 

10 ms

t

OFF 

 

1 ms

0.2 V

0.2 V

0.2 V

4.5 V

NOTE: * t

OFF 

indicates Power-off Period.

V

DD

LCD27-26

Figure 7.

Dot-Matrix LCD Units

20

Display Unit User’s Manual

Summary of Contents for LM161 Series

Page 1: ...Dot Matrix LCD Units with built in controllers DISPLAY UNIT USER S MANUAL ...

Page 2: ...tered or modified in design or construction or which has been serviced or repaired by anyone other than Sharp The warranties set forth herein are in lieu of and exclusive of all other warranties express or implied ALL EXPRESS AND IMPLIED WARRANTIES INCLUDING THE WARRANTIES OF MERCHANTABILITY FITNESS FOR USE AND FITNESS FOR A PARTICULAR PURPOSE ARE SPECIFICALLY EXCLUDED In no event will Sharp be li...

Page 3: ...ruction 15 ELECTRICAL CHARACTERISTICS 19 Absolute Maximum Ratings 19 Electrical Characteristics 19 Timing Characteristics 19 Power Conditions for Internal Reset 20 LCD UNIT USAGE INSTRUCTIONS 21 Interface with External Microprocessor 21 Contrast Control Voltage 24 Sample Instruction Procedures 24 HANDLING INSTRUCTIONS 28 OPERATING RESTRICTIONS 29 Dot Matrix LCD Units Display Unit User s Manual 1 ...

Page 4: ...ocomputer to display alphanumeric characters symbols etc The LCD unit provides the user with a dot matrix display panel featuring simple interface circuitry 02 12 180 5 2 5 7 56 63 250 7 0 GRWV 0 GRWV 0 GRWV 0 GRWV Table 1 Dot Matrix LCD Unit with Built In Controllers Dot Matrix LCD Units 2 Display Unit User s Manual ...

Page 5: ...er may define up to eight additional 5 7 dot ma trix character patterns as required by the applica tion To display a character positional data is sent via the data bus from the microprocessor to the LCD unit where it is written into the instruction register A character code is then sent and written into the data register The LCDunit displays thecorrespond ing character pattern in the specified pos...

Page 6: ... transfer is completed data from the next address position of the appropriate RAM is moved to the data register in preparation for subsequent reading operations by the microprocessor One of the two registers is selected by the register select RS signal 6 1 1 0 1387 287387 7 51 211 7 21 81 7 21 56 QSXW 038 5HJLVWHU VHOHFW VLJQDO QVWUXFWLRQ UHJLVWHU ZKHQ ZULWLQJ XV IODJ DQG DGGUHVV FRXQWHU ZKHQ UHDG...

Page 7: ...play When a display shift takes place the addresses shift is as follows The addresses for the second line are not con tinuous to the addresses for the first line A40 char acter RAM area is assigned to each of the two line as follows line 1 00H 27H line 2 40H 67H For an LCD unit with a display capacity of less than 40 characters per line characters equal in number to the display capacity as counted...

Page 8: ...unter contains 08 HEX Parallel to Serial Converter This circuit converts parallel data read from the CG ROM or CG RAM to serial data for use by the display driver Bias Voltage Generator This circuit provides the bias voltage level re quired for driving the liquid crystal display Some models incorporate a temperature compensation circuit which generates a temperature dependent bias voltage in order...

Page 9: ...ister R 8 Character Generator ROM CG ROM 7 200 bits 8 8 Character Generator ROM CG ROM 512 bits 7 8 Parallel to Serial Converter 5 5 Bias Voltage Generator See Note 1 6 Data Register DR 8 I O Buffer 8 Busy Flag BF 7 8 RS R W E 4 4 DB4 DB7 DB0 DB3 VDD VO VSS LCD27 6 NOTES 1 LM16152 incorporates a temperature compensation circuit within the bias voltage generator See table 12 2 For the inverters of ...

Page 10: ...x0101 xxx0110 xxxx0111 xxxx1000 xxxx1001 xxxx1010 xxxx1011 xxxx1100 xxxx1101 xxxx1110 xxxx1111 CG RAM 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 NOTES 1 The CG RAM generates character patterns in accordance with the user s program 2 Shaded areas indicate 5 x 10 dot character patterns Table 4 Character Codes Dot Matrix LCD Units 8 Display Unit User s Manual ...

Page 11: ...0 0 P p 1 A Q a q α p ä q 2 B R b r 3 C S c s 4 D T d t 5 E U e u 6 F V f v 7 G W g w 8 H X h x 9 I Y i y J Z j z K k β θ ε µ Ω σ ü ρ Σ π x _1 y j x n ö 0010 0011 0100 0101 0110 0111 1010 1011 1100 1101 1110 1111 Low Order 4 bit 2 5 L 1 M m N n O _ o 4 bit Table 5 Character Codes Dot Matrix LCD Units Display Unit User s Manual 9 ...

Page 12: ...with the display cursor Any 1 bits in the 8th row will result in a displayed dot regardless of the cursor status ON OFF Accordingly if the cursor is to be used CG RAM data for the 8th row should be set to 0 3 CG RAM data bits 0 4 correspond to the column position of each character pattern bit 4 corresponding to the left most column of the character pattern CG RAM data bits 5 7 are not used for dis...

Page 13: ... the low order 4 bits corresponding to DB0 DB3 in an 8 bit transfer The busy flag is to be checked on completion of the second 4 bit data transfer Busy flag and address counter are output in two opera tions 8 bit Microprocessor Interface Each 8 bit piece of data is transferred in a single opera tion using the entire data bus DB0 DB7 IR7 DB7 DB6 DB5 DB4 RS R W E IR3 AC3 DR7 DR3 BF IR6 IR2 AC2 DR6 D...

Page 14: ... length for interface N 0 Single line display F 0 5 7 dot matrix character font 3 Display ON OFF Control D 0 Display OFF C 0 Cursor OFF B 0 Blink function OFF 4 Entry Mode Set I D 1 Increment Mode S 0 Display shift OFF CAUTION If the power conditions stated in Table 11 Power condi tions applicable when internal reset circuit is used are not satisfied then internal reset circuit will not operate pr...

Page 15: ...0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 I D S Busy flag can t be checked before execution of this instruction Function Set 8 Bit Interface Busy flag can t be checked before execution of this instruction Function Set 8 Bit Interface Busy flag can t be checked before execution of this instruction Function Set 8 Bit Interface a Busy flag can be checked after the following instructions are c...

Page 16: ...d after the following instructions are completed If the busy flag is not going to be checked then a wait time longer than the total execution time of these instructions is required See Table 7 This instruction signals the LCD unit to begin accepting and sending data in dual 4 bit transfers for all subsequent transfers for all subsequent transactions This is the only 4 bit instruction recognized by...

Page 17: ...before sending the next instruction NOTE Either the microprocessor must check that the busy flag is not set to 1 before sending each instruction or the interval waited before sending each instruction must be made sufficiently longer than the execution time of the previous instruction For the execution time of each instruction see Table 7 Description of Instruction Display Clear The display data RA...

Page 18: ...r does not move back to the home position but rather to the first position of the second line NOTE When the display is shifted the address counter is not affected Function Set DL Selects the interface data length When DL 1 8 bit data transfers are used When DL 0 4 bit data transfers are used NOTE When using a 4 bit data length two transfer operations are needed to transfer a complete data word to ...

Page 19: ...t may also take place after the data is written CG RAM DD RAM Data Read An 8 bit data word is read from either the charac ter generator RAM or display data RAM as deter mined by a previously executed address set instruction The data is read from the RAM location specified by the address counter Thisinstructionmustbeimmediatelyprecededby the CG RAM address set instruction the DD RAM address set ins...

Page 20: ...KLIW GLVSOD RU PRYH FXUVRU µV XQFWLRQ 6HW 1 6HW LQWHUIDFH GDWD OHQJWK DQG QXPEHU RI GLVSOD OLQHV 1 µV 5 0 GGUHVV 6HW RDG WKH DGGUHVV FRXQWHU ZLWK D 5 0 DGGUHVV 6XEVHTXHQW GDWD LV 5 0 GDWD µV 5 0 GGUHVV 6HW RDG WKH DGGUHVV FRXQWHU ZLWK D 5 0 DGGUHVV 6XEVHTXHQW GDWD LV 5 0 GDWD µV XV ODJ GGUHVV RXQWHU 5HDG 5HDG EXV IODJ DQG FRQWHQWV RI DGGUHVV FRXQWHU µV 5 0 5 0 DWD ULWH ULWH GDWD ULWH GDWD WR 5 0 R...

Page 21: ... 67 21 7 216 0 1 0 81 7 2XWSXW 9ROWDJH 92 2 P 9 92 2 P 9 Table 8 tAS PWEH tDSW tcycE tAH tAH VIH VIL DB0 DB7 tEf tH tEr VIH VIL E VIL R W VIH VIL RS VALID DATA LCD27 24 Figure 5 Write Operation Timing Diagram For data sent from the external microprocessor to the LCD unit 3 5 0 7 5 6 0 2 9 8 81 7 0 1 0 QDEOH FOH 7LPH W QV QDEOH 3XOVH LGWK LJK HYHO 3 QV QDEOH 5LVH DOO 7LPH W U W I QV 6HWXS 7LPH 56 5...

Page 22: ...t to the external microprocessor 3 5 0 7 5 6 0 2 9 8 81 7 0 1 0 QDEOH FOH 7LPH WF F QV QDEOH 3XOVH LGWK LJK HYHO 3 QV QDEOH 5LVH DOO 7LPH W U W I QV 6HWXS 7LPH 56 5 W 6 QV GGUHVV ROG 7LPH W QV DWD HOD 7LPH W 5 QV DWD ROG 7LPH W2 5 QV Table 10 Read Operation Timing Characteristics VDD 5 0 5 VSS 0 V Ta 0 50 C 3 5 0 7 5 6 0 2 9 8 81 7 0 1 7 3 0 9ROWDJH XLOG 8S 7LPH WUFF PV 3RZHU 2II 3HULRG W2 PV Tabl...

Page 23: ...connected to E R W and RS respectively When the PIA is used care must be taken to insure the proper relationship between the E signal and other signals when reading and writ ing data RS R W E OPERATING STATUS DB7 INTERNAL OPERATION Write Instruction Write Instruction Check Busy Flag Check Busy Flag Check Busy Flag READY FOR DATA DATA BUSY BUSY NOT BUSY DATA LCD27 27 Figure 8 8 Bit Interface Timing...

Page 24: ... 80 Microprocessor VMA φ2 A15 A0 R W D0 D7 MC6800 8 LCD UNIT E RS R W DB0 DB7 LCD27 29 C2 C0 C1 A0 A7 MC6805 8 LCD UNIT DB0 DB7 E RS R W LCD27 30 D0 D7 A0 A4 A5 A6 A7 MI Z80 IORQ RD DB0 DB7 RS E LCD UNIT R W A B C G2A G G2B Y1 LS138 1 KΩ 200PF LCD27 31 Dot Matrix LCD Units 22 Display Unit User s Manual ...

Page 25: ...e written again i e the function set instruction must be written twice Subsequent data trans fers are completed in two 4 bit transfer opera tions see Table 14 RS R W E OPERATING STATUS DB7 INTERNAL OPERATION READY FOR DATA IR7 BUSY NOT BUSY IR3 AC3 AC3 D7 D3 LCD27 32 Write Instruction NOTE IR7 IR3 Instruction bits 7 and 3 AC3 Address counter bit 3 Write Instruction Check Busy Flag Check Busy Flag ...

Page 26: ...rred in two operations after selecting the 4 bit data length function For the timing wave form see Figure 9 Figure 10 shows a sample connection to an SM 200 microprocessor It should be noted that the busy flag check requires a two step operation 3 8 Bit Data Transfer with a Dual Line 16 Charac ter Display Using Internal Reset Table 15 shows a sample operating procedure for an LCD unit in this mode...

Page 27: ... 6HW oOooSHARP LCD UNIT 6HW GLVSOD WR VKLIW DIWHU HDFK GDWD ZULWH 5 0 5 0 DWD ULWH o OOHARP LCD UNIT L_ ULWH LQWR WKH 5 0 5 0 5 0 DWD ULWH oooOLCD UNIT LM171_ ULWH LQWR WKH 5 0 LVSOD XUVRU 6KLIW oooOLCD UNIT LM171 6KLIW WKH FXUVRU WR WKH OHIW LVSOD XUVRU 6KLIW oooOLCD UNIT LM171 6KLIW WKH FXUVRU WR WKH OHIW 5 0 5 0 DWD ULWH oooOLCD UNIT LM161 ULWH LQWR WKH 5 0 LVSOD XUVRU 6KLIW oooOLCD UNIT L161 6...

Page 28: ... 0 DWD ULWH ooOoSHARP L_ ULWH LQWR WKH 5 0 5 0 5 0 DWD ULWH ooOoSHARP LCD _ ULWH VSDFH LQWR WKH 5 0 QWU 0RGH 6HW ooOoSHARP LCD _ 6HW WKH GLVSOD WR VKLIW DIWHU HDFK GDWD ZULWH 5 0 5 0 DWD ULWH ooOoHARP CD U_ ULWH 8 LQWR WKH 5 0 5LJKW DQG OHIW KDOYHV RI GLVSOD VKLIW OHIW RQH FKDUDFWHU QWU 0RGH 6HW ooOoHARP CD U_ 6HW WKH XQLW WR LQFUHPHQW WKH DGGUHVV FRXQWHU DQG VKLIW WKH FXUVRU WR WKH ULJKW DIWHU HD...

Page 29: ...0 5 0 DWD ULWH ULWH VSDFH LQWR WKH 5 0 5 0 GGUHVV 6HW 6HW 5 0 DGGUHVV WR WKH ILUVW SRVLWLRQ RI WKH VHFRQG OLQH 5 0 5 0 DWD ULWH ULWH LQWR WKH 5 0 5 0 5 0 DWD ULWH ULWH LQWR WKH 5 0 QWU 0RGH 6HW 6HW WKH GLVSOD WR VKLIW DIWHU HDFK GDWD ZULWH 5 0 5 0 DWD ULWH ULWH 5 LQWR WKH 5 0 RWK OLQHV VKLIW WR WKH OHIW LVSOD XUVRU RPH 5HVWURUH WKH GLVSOD DQG FXUVRU WR WKHLU LQLWLDO SRVLWLRQV Table 15 8 Bit Data T...

Page 30: ...unit while the input signal terminals are open Also it is better if the input signal and LCD unit power supply voltages are switched on and off simultaneously 6 The LCD unit should be stored in its original packing case at a temperature of 0 to 35 C and at a relative humidity of 60 or less The LCD unit should be stored in a dark place not ex posed to direct sunlight or fluorescent lamps 7 The foll...

Page 31: ...ddress type b and c Total 80 Characters Total 40 Characters x 2 Lines The contents of address locations 23 27 63 and 67 may be lost during the execution of the display cursor home instruction NOTE Although address type C is for a single line display its address structure is logically the same as for address type b The contents of addresses 43 47 4B and 4F may be destroyed 12 23 5 7 21 5 675 7 21 H...

Page 32: ...DFW Airport TX Ph 972 456 8560 Fax 972 456 0360 Houston TX Ph 281 955 9909 Fax 281 955 9910 East Burlington MA Ph 781 270 7979 Fax 781 229 9117 Annandale NJ Ph 908 713 0505 Fax 908 713 0312 Research Triangle Park NC Ph 919 941 0065 Fax 919 941 0066 Distributors Bell Milgray El Segundo CA Ph 310 563 2355 Fax 310 563 2514 Future Electronics Canada Ph 514 694 7710 Fax 514 695 3707 Marshall Industries...

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