Sharp LC-32LE340E, Service Manual

Page: 47 / 140

LC-32LE340/343
LC-40LE340/343
29
10. 4Gbit NAND Flash Memory (U35)
ST NAND04G-B2D
a) Key Features
Ŷ+LJKGHQVLW\1$1')ODVK0HPRU\
– Up to 8 Gbit memory array
– Cost-effective solution for mass storage
applications
Ŷ1$1'LQWHUIDFH
– x8 or 16x bus width
– Multiplexed address/data
Ŷ6XSSO\YROWDJH9RU9GHYLFH
Ŷ3DJHVL]H
– x8 device: (2048 + 64 spare) bytes
– x16 device: (1024 + 32 spare) words
Ŷ%ORFNVL]H
– x8 device: (128K + 4 K spare) bytes
– x16 device: (64K + 2 K spare) words
Ŷ0XOWLSODQHDUFKLWHFWXUH
– Array split into two independent planes
– Program/erase operations can be
performed on both planes at the same time
Ŷ3DJHUHDGSURJUDP
– Random access: 25 µs (max)
– Sequential access: 25 ns (min)
– Page program time: 200 µs (typ)
– Multiplane page program time (2 pages):
200 µs (typ)
Ŷ&RS\EDFNSURJUDPZLWKDXWRPDWLFHUURU
detection code (EDC)
Ŷ&DFKHUHDGPRGH
Ŷ)DVWEORFNHUDVH
– Block erase time: 1.5 ms (typ)
– Multiblock erase time (2 blocks):
1.5 ms (typ)
Ŷ6WDWXV5HJLVWHU
Ŷ(OHFWURQLFVLJQDWXUH
Ŷ&KLS(QDEOHµGRQ¶WFDUH¶
Ŷ6HULDOQXPEHURSWLRQ
Ŷ+LJKGHQVLW\1$1')ODVK0HPRU\
– Up to 8 Gbit memory array
– Cost-effective solution for mass storage
applications
Ŷ1$1'LQWHU face
– x8 or 16x bus width
– Multiplexed address/data
Ŷ6XSSO\YROWDJH9RU9GHYLFH
Ŷ3DJHVL]H
– x8 device: (2048 + 64 spare) bytes
– x16 device: (1024 + 32 spare) words
Ŷ%ORFNVL]H
– x8 device: (128K + 4 K spare) bytes
– x16 device: (64K + 2 K spare) words
Ŷ0XOWLSODQHDUFKLWHFWXUH
– Array split into two independent planes
– Program/erase operations can be
performed on both planes at the same time
Ŷ3DJHUHDGSURJUDP
– Random access: 25 µs (max)
– Sequential access: 25 ns (min)
– Page program time: 200 µs (typ)
– Multiplane page program time (2 pages):
200 µs (typ)
Ŷ&RS\EDFNSURJUDPZLWKDXWRPDWLFHUURU
detection code (EDC)
Ŷ&DFKHUHDGPRGH
Ŷ)DVWEORFNHUDVH
– Block erase time: 1.5 ms (typ)
– Multiblock erase time (2 blocks):
1.5 ms (typ)
Ŷ6WDWXV5HJLVWHU
Ŷ(OHFWURQLFVLJQDWXUH
Ŷ&KLS(QDEOHµGRQ¶WFDUH¶
Ŷ6HULDOQXPEHURSWLR n
47
LC-32LE340/343
LC-40LE340/343