FO-90AAR
4 – 1
[1] Block diagram
CHAPTER 4. DIAGRAMS
SRAM
256kbit
ROM
2Mbit
CPU
CPU I/F
TIMER
RTC
PIO
WATCHDOG
TIMER
CLOCK
32.768kHz
INTERRUPT
CONTROLLER
CIS I/F
MOTOR I/F
SENSOR I/F
SIO
THERMAL
HEAD I/F
PANEL I/F
PM
OPERATION
PANEL
CONTROL PWB UNIT
1CHIP FAX ENGINE (FC200)
HANDSET
SPEAKER
+5V
+24V
OPERATION
PANEL
TEL/LIU
PWB UNIT
DRIVER
THERMAL
HEAD
PM
CONTACT
IMAGE
SENSOR
DOCUMENT
SENSOR
POWER SUPPLY
PWB UNIT
STABILIZER
MODEM
FM209V
AMPLIFIER
AMPLIFIER
SURGE
PROTECT/
FILTER
CML
TRANSFORMER
CI
VBT
RECTIFIER
TRANSFORMER
RECTIFIER
DIODE
TRANSSURGE
ABSORBER
FILTER
LINE
PAPER
SENSOR
RESET IC
AMPLIFIER
BZ
CLOCK
32.256MHz
LCD
D-FF
16MHz
+3.3V
+5V
REGULATOR
CUTTER
AMPLIFIER
FLASH
MEMORY
512k x 8bit
SPEAKER
AMPLIFIER
Summary of Contents for FO-90A
Page 6: ...FO 90AAR M E M O 1 10 ...
Page 27: ...FO 90AAR 2 21 M E M O ...
Page 49: ...FO 90AAR Control PWB parts layout Top side 6 7 ...
Page 50: ...FO 90AAR Control PWB parts layout Bottom side 6 8 ...
Page 53: ...FO 90AAR TEL LIU PWB parts layout Top side 6 11 ...
Page 54: ...FO 90AAR 6 12 TEL LIU PWB parts layout Bottom side ...
Page 58: ...FO 90AAR 6 16 M E M O ...