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cRIO LVDT 9312 Module
Technical Description
Issue
05
24/05/2022
5.1.1.4
A
PPLICATION
T
O
M
ODULE
C
OMMUNICATION
D
IAGRAM
Communication with a single LVDT9312 module:
The diagram below illustrates the communication scheme between application, Function-VI, Driver-VI and
LVDT9312 module (slot 1). From the diagram it can be noticed that the Driver-VI of the FPGA driver (slot 1) is
located outside and parallel to the code section which triggers the instructions. However, the Function-VI may be
used within any LabVIEW structure like loops, cases or sequences. Furthermore, multiple calls are allowed which
are operated sequentially. Note that the Function-VIs use non-re-entrant structures.
Driver-Call for Module in Slot 1
LVDT Function-VI for Slot 1
Command
DATA
Slot1_CommandIN_FIFO
The Function-VI writes Command
and DATA via Command_IN FIFO
to the parallel running Driver-VI.
Slot1_CommandOUT_FIFO
The parallel running Driver-VI
stores the Answer-Data in the
Command_OUT FIFO.
Command
ERROR
DATA
Calling LabVIEW-Application
SPI
Driver-VI
for Slot 1
Parallel running Driver-VI for Slot 1
Communication between application and LVDT9312 module
Transmit Data
Receive Data
