Technical Explanation
SKiiP
®
3 Parallel Board
© by SEMIKRON
2017-08-30
– Rev02
14 / 20
10 Error indication with LED
Two LED are placed on the Parallel board for error indication. The location of the LEDs is shown in the Figure 9
Figure 9: LED position on the SKiiP3 Parallel board
The description of the error indication is done in the Table 8.
Table 8: LED states and meanings
Operating mode
LED lights
V901
V902
IDLE (no clocking, no error)
grün
grün
By clocking and no error
grün
orange
By clocking and Error
rot
orange
No clocking and Error
rot
grün
11 Interlock time
Generation of dominant Interlock time for all connected SKiiP
®
3 (See data sheet Parallel board SKiiP
®
3). Thus
the internal Interlock time (t
TD
=3 µs) of SKiiP
®
3 subsystems is not valid anymore. The SKiiP
®
3 Parallel Board
sets the dominant interlock time t
TD
=4µs for all SKiiP
®
3 subsystems.
Please note:
Only above listed states are possible in regular operation mode. If some other state is
present, there is no supply voltage for the board or the LED/LEDs are out of functioning.
