SBC-A62-J
SBC-A62-J User Manual - Rev. First Edition: 1.0 - Last Edition: 2.3 - Author: S.B. - Reviewed by N.P. Copyright © 2016 SECO S.r.l.
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3.3
Connectors description
3.3.1
LVDS + backlight connector
SBC-A62-J board can be interfaced to LCD displays using its LVDS interface, which allows the connection of displays with a colour depth of 18 or 24 bit, single or
dual channel.
It is possible to configure LVDS output so that it can be used as:
One single channel (18 or 24 bit) output, max resolution supported 1366 x 768 @ 60fps
One dual channel (18 or 24 bit) output, max resolution supported 1920 x 1200 @ 60fps
Two identical single channel outputs, max resolution supported 1366 x 768 @ 60fps
Two independent single channel outputs, max resolution supported 1366 x 768 @ 60fps on each
channel
For the connection, a connector type HR A1014WVB-S-2x20P or equivalent (2 x
20p, male, straight, P1, low profile, polarized) can be provided, with the pin-out
shown in the table below.
Mating connector: HR A1014H-2X20P with HR A1014-T female crimp terminals.
On the same connectors, are also implemented signals for direct driving of display
’
s
backlight: voltages (VIN, +5V
LCD
and +3.3V
LCD
) and control signals (Backlight enable
signal, LVDS_BLT_EN, and Backlight Brightness Control signal, LVDS_BLT_CTRL).
V
IN
voltage, available on pins 1-2, is the Power Voltage that is supplied to the board though DC Jack CN22 or
Power in connector J26 (+12V
DC
is supported).
+5V
LCD
is derived from +5V_SB power rail. +3.3V
LCD
is derived from +3P3V_SB power rail. Both voltages are
switched on and off via SW.
When building a cable for connection of LVDS displays, please take care of twist as tight as possible
differential pairs
’
signal wires, in order to reduce EMI interferences. Shielded cables are also
recommended.Here following the signals related to LVDS management:
LV/LVDS0_TX0-: LVDS Channel #0 differential data pair #0.
LV/LVDS0_TX1-: LVDS Channel #0 differential data pair #1.
LV/LVDS0_TX2-: LVDS Channel #0 differential data pair #2.
Optional LVDS connector - CN13
Pin Signal
Pin Signal
1
V
IN
2
V
IN
3
+3.3V
LCD
4
+5V
LCD
5
+3.3V
LCD
6
+5V
LCD
7
LVDS1_TX0-
8
LVDS0_TX0-
9
LV
10
LV
11
GND
12
GND
13
LVDS1_TX1-
14
LVDS0_TX1-
15
LV
16
LV
17
GND
18
GND
19
LVDS1_TX2-
20
LVDS0_TX2-
21
LV
22
LV
23
GND
24
GND
25
LVDS1_TX3-
26
LVDS0_TX3-
27
LV
28
LV
29
GND
30
GND
31
LVDS1_CLK-
32
LVDS0_CLK-
33
LV
34
LV
35
LVDS_BLT_EN
36
LVDS_BLT_CTRL
37
GND
38
GND
39
GND
40
GND
