Seagate Exos 7E8 SATA Product Manual, Rev. F
33
6.3.1
Identify Device command
The Identify Device command (command code EC
H
) transfers information about the drive to the host following power up. The data is
organized as a single 4096-byte block of data, whose contents are shown in
. All reserved bits or words should be
set to zero. Parameters listed with an “x” are drive-specific or vary with the state of the drive.
for default
parameter settings.
The following commands contain drive-specific features that may not be included in the Serial ATA specification
Table 10 Identify Device commands
Word
Description
Value
0
Configuration information:
• Bit 15: 0 = ATA; 1 = ATAPI
• Bit 7: removable media
• Bit 6: removable controller
• Bit 0: reserved
0C5A
H
1
Number of logical cylinders
16,383
2
ATA-reserved
0000
H
3
Number of logical heads
16
4
Retired
0000
H
5
Retired
0000
H
6
Number of logical sectors per logical track: 63
003F
H
7–9
Retired
0000
H
10–19
Serial number: (20 ASCII characters, 0000
H
= none)
ASCII
20-21
Retired
0000
H
22
Obsolete
0000
H
23–26
Firmware revision (8 ASCII character string, padded with blanks to end of string)
x.xx
27–46
Drive model number: (40 ASCII characters, padded with blanks to end of string)
47
(Bits 7–0) Maximum sectors per interrupt on Read multiple and Write multiple (16)
8010
H
48
Trusted computing feature set options
4000
H
49
Standard Standby timer, IORDY supported and may be disabled
2F00
H
50
ATA-reserved
0000
H
51
PIO data-transfer cycle timing mode
0200
H
52
Retired
0200
H
53
Words 54–58, 64–70 and 88 are valid
0007
H
54-58
Obsolete
xxxx
H
59
Number of sectors transferred during a Read Multiple or Write Multiple command
xxxx
H
60–61
Total number of user-addressable LBA sectors available
for related information)
*Note: The maximum value allowed in this field is: 0FFFFFFFh (268,435,455 sectors,
137GB). Drives with capacities over 137GB will have 0FFFFFFFh in this field and the actual
number of user-addressable LBAs specified in words 100-103. This is required for drives
that support the 48-bit addressing feature.
0FFFFFFFh*
62
Retired
0000
H
63
Multiword DMA active and modes supported (see note following this table)
x4
07
H
64
Advanced PIO modes supported (modes 3 and 4 supported)
0003
H
65
Minimum multiword DMA transfer cycle time per word (120 ns)
0078
H
66
Recommended multiword DMA transfer cycle time per word (120 ns)
0078
H
67
Minimum PIO cycle time without IORDY flow control (120 ns)
0078
H