4.15
Date Code 20170814
Instruction Manual
SEL-700G Relay
Protection and Logic Functions
Group Settings (SET Command)
programmed to force the element into high security mode during these
external events. The HSM SEL
OGIC
control equation can be programmed to
assert based on the external event detector Relay Word bits as follows:
HSM = (DRDOPT OR HRT) AND NOT RHSM
When HSM = 1, the element switches to the high security characteristic
(O87P2 pickup, slopes SLP12 and SLP22) shown in Figure 4.2. Refer to
Figure 4.9, Figure 4.10, and Figure 4.11 for the logic associated with the
Relay Word bits DRDOPT, HRT, and RHSM, respectively. The HSMDOT
default dropout time of 10 seconds will maintain the external event detector
DRDOPT bit assertion longer than the duration of most inrush events.
Program HSMDOT to meet the needs of your application.
Similarly, the O87P2 default setting of 1.25 should avoid an undesired
operation under severe CT mismatch conditions while maintaining adequate
sensitivity for internal faults. To achieve a balance between security and
sensitivity, set O87P2 = AUTO. O87P2 can only be set to AUTO when
E87 = GEN. AO87P2 is used as a pickup for the high security differential
element shown in Figure 4.5. Figure 4.12 shows how AO87P2 is computed.
KCLI is the phasor sum of the six normalized compensated currents. In the
case of tightly matched CTs and with even CT saturation or no CT saturation,
we can expect the output of KCLI to be zero and AO87P2 to equal the O87P
setting. Any uneven saturation will result in an increase in KCLI and pickup
of AO87P2, thus increasing the security of the element. As the CTs recover
from uneven saturation, KCLI and AO87P2 decrease, thus increasing the
sensitivity of the element for evolving internal faults.
All previous settings can be optimized based on worst case inrush currents
expected or monitored in a specific application. For more information, refer to
the Western Protective Relay Conference paper Generator Protection
Overcomes Current Transformer Limitations, available at selinc.com, or
contact your SEL customer service representative.
Figure 4.9
Delta IRTn and Delta IOPn External Event Detector Logic
DRDOPT2
DRDOPT3
DRDOPT1
DRDOPT
HSMDOT
1/2 cycle
Σ
Σ
abs
0.5
0.75
2-Cycle
Buffer
2-Cycle
Buffer
IOP1
IRT1/2
Relay
Word
Bits
Relay
Word
Bits
Summary of Contents for SEL-700G Series
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