Date Code 20020215
Loss-of-Potential, Load Encroachment, and Directional Element Logic
4-3
SEL-351R Instruction Manual
Figure 4.2: Load-Encroachment Logic
Note that a positive-sequence impedance calculation (Z
1
) is made in the load-encroachment logic
in Figure 4.2. Load is largely a balanced condition, so apparent positive-sequence impedance is
a good load measure. The load-encroachment logic only operates if the positive-sequence
current (I
1
) is greater than the Positive-Sequence Threshold defined in Figure 4.2. For a balanced
load condition, I
1
= phase current magnitude.
Forward load (load flowing out) lies within the hatched region labeled ZLOUT. Relay Word bit
ZLOUT asserts to logical 1 when the load lies within this hatched region.
Reverse load (load flowing in) lies within the hatched region labeled ZLIN. Relay Word bit
ZLIN asserts to logical 1 when the load lies within this hatched region.
Relay Word bit ZLOAD is the OR-combination of ZLOUT and ZLIN:
ZLOAD = ZLOUT + ZLIN
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