Hardware Manual for the PCD2.M5 Series│Document 26/856; Version EN 12│2014-07-24
Saia-Burgess Controls AG
Hardware clock/harware watchdog
PCD2.M5_ Classic CPUs and expansion housings
3-50
3
3.14
Hardware clock (Real Time Clock)
The PCD2.M5_ CPUs are fitted with a hardware clock on the motherboard:
The presence of a hardware clock is an absolute requirement where the HeaVAC
library clock timers are used.
3.15
Hardware watchdog
PCD2.M5_ CPUs are fitted with a hardware watchdog as standard. A relay at I/O
address 255 can be triggered; this remains activated as long as the status of O 255
changes periodically at least every 200 ms. Within PG5, FBoxes are provided for this
purpose.
If for any reason the program component with the watchdog FBox is no longer being
processed at sufficiently short intervals, the watchdog relay will drop out and the
amber watchdog LED will go out. Please read the online help for these FBoxes for
more details.
The same function can also be implemented with IL (AWL) instructions. This variant
works
independently of the cycle time
of the user program.
Example:
COB
0
; or 1 … 15
0
STL
WD_Flag
;Invert help flag
OUT
WD_Flag
OUT
O 255
;Set output 255 to flashing
: :
: :
ECOB
With the code shown in the example, the watchdog also drops out in the case of
loops caused by the programmer. With regard to the cycle time of the user program,
please note:
With cycle times over 200 ms, the code sequence must be repeated several times
in the user program, to prevent the watchdog dropping out in normal operation.
