– 4 –
Fig. 1-3. IC901 Block Diagram
3. Part of IC905 (generation of vertical transfer clock,
H Driver) and IC901 (V Driver)
An H driver (part of IC905) and V driver (IC901) are neces-
sary in order to generate the clocks (vertical transfer clock,
horizontal transfer clock and electronic shutter clock) which
driver the CCD.
IC905 has the generation of horizontal transfer clock and the
function of H driver, and is an inverter IC which drives the
horizontal CCDs (H1 and H2). It carries out generating verti-
cal transfer clock, and output to IC901.
In addition the XV1-XV6 signals which are output from IC905
are vertical transfer clocks, and the XSG signal is superim-
posed onto XV1, XV3 and XV5 at IC901 in order to generate
a ternary pulse. In addition, the XSUB signal which is output
from IC101 is used as the sweep pulse for the electronic shut-
ter, and the RG signal which is output from IC905 is the reset
gate clock.
Fig. 1-4. IC905 Block Diagram
4. IC905 (H Driver, CDS, AGC and A/D converter)
IC905 contains the functions of H driver, CDS, AGC and A/D
converter. As horizontal clock driver for CCD image sensor,
HØ1 (A and B) and HØ2 (A and B) are generated inside, and
output to CCD.
The video signal which is output from the CCD is input to pin
(A6) of IC905. There are sampling hold blocks generated from
the SHP and SHD pulses, and it is here that CDS (correlated
double sampling) is carried out.
After passing through the CDS circuit, the signal passes
through the AGC amplifier (VGA: Variable Gain Amplifier). It
is A/D converted internally into a 14-bit signal, and is then
input to ASIC (IC101). The gain of the VGA amplifier is con-
trolled by pin (A2), (B3) and (C4) serial signal which is output
from ASIC (IC101).
1
3
32
33
31
30
37
38
35
36
34
42
43
44
39
40
41
4
26
13
14
12
11
SUBCNT
VDC
CH1
V1
V6
V4
V5R
V5L
V3R
V3L
V1S
CH5
V5
CH3
CH4
V3
CH2
GND
VH
OV3B
OV3A
OV5B
OV5A
Level
conversion
29
V2
2 SUB
Level
conversion
Level
conversion
Level
conversion
Level
conversion
Level
conversion
Level
conversion
Level
conversion
Level
conversion
Level
conversion
Level
conversion
Level
conversion
Level
conversion
Level
conversion
Level
conversion
Level
conversion
Level
conversion
Level
conversion
28
RESET
20
OV1
8
VM
21
OV6
23
OV4
24
OV2
27
VL
10
OSUB
9
VMSUB
5
VL
2-level
2-level
2-level
3-level
25
19
17
15
18
VM
OV1S
OV3L
OV3R
OV5L
7
16 OV5R
VHH
6 VH
2-level
2-level
2-level
2-level
2-level
3-level
3-level
3-level
3-level
3-level
CCDIN
HL
H1 TO H8
SYNC
HD
SDI
SCK
SL
DOUT
REFB
REFT
PRECISION
TIMING
GENERATOR
SYNC
GENERATOR
VGA
14-BIT
ADC
14
6~42 dB
VREF
CLAMP
INTERNAL
REGISTERS
INTERNAL
CLOCKS
CDS
HORIZONTAL
DRIVERS
8
AD9996
-3dB, 0dB, +3dB
VD
CLI CLO
VERTICAL
TIMING
CONTROL
XV1 TO XV24
24
XSUBCK
RG
GP01 TO GP08
3V INPUT
1.8V OUTPUT
1.8V INPUT
3V OUTPUT
CHARGE
PUMP
LDO
REG
8
