Sanyo VPC-AZ3, Service Manual

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Fig. 1-2. IC931 Block Diagram
CCDIN
RG
H1-H4
VD HD SDATA
SCK SL
CLI
CLPOB
CLPDM
DOUT
VRB
VRT
PRECISION
TIMING
CORE
SYNC
GENERATOR
PxGA
VGA
ADC
12
2~36 dB
PBLK
VREF
CLAMP
INTERNAL
REGISTERS
INTERNAL
CLOCKS
CDS
CLAMP
HORIZONTAL
DRIVERS
4
3. IC934 (V Driver) and IC931 (H Driver)
An H driver and V driver are necessary in order to generate
the clocks (vertical transfer clock, horizontal transfer clock
and electronic shutter clock) which driver the CCD. IC934 is
V driver. In addition the XV1-XV4 signals which are output
from IC102 are the vertical transfer clocks, and the XSG sig-
nal which is output from IC102 is superimposed onto XV1
and XV3 at IC934 in order to generate a ternary pulse. In
addition, the XSUB signal which is output from IC102 is used
as the sweep pulse for the electronic shutter. A H driver is
inside IC931, and H1, H2 and RG clock are generated at
IC931.
4. IC931 (CDS, AGC Circuit and A/D Converter)
The video signal which is output from the CCD is input to Pin
(29) of IC931. There are inside the sampling hold block, AGC
block and A/D converter block.
The setting of sampling phase and AGC amplifier is carried
out by serial data at Pin (37) of IC911. The video signal is
carried out A/D converter, and is output by 12-bit.