-62-
Pin Function Name
Function
Pol.
Action
128 CKE
CK Enable(SDRAM)
O
-
129 RAS3
SDRAM RAS
O
-
130 SH_EEP_WP
EEPROM Write Protect
O
H: Write Disable L: Write Enable
131 CAS
SDRAM CAS
O
-
132 GND
Power for Input/Output(0V)
-
-
133 STB_GAM_WP
Control for Digital Gamma IC (3 line Serial Stlobe)
O
Select L
134 3.3V
Power for Input/Output(3.3V)
-
-
135 SCLK_GAM_SH
Control for Digital Gamma IC (3 line Serial CLK)
136 SDATA_GAM_SH
Control for Digital Gamma IC (3 line Serial DATA)
137 GND
Power (0V)
-
-
138 PW_RESET
Reset for PW
O
Reset with L -> H -> L
139 1.9V
Power (1.9V)
-
-
140 PW_SEL
PIXEL 232C Selection
O
SH:H, PW:L
141 EXP_RESET
I/O Expander Reset Signal
O
Reset: H
142 RESET_GAM
Reset for Digital Gamma IC
O
143 TDO [for ICE]
Test Data output
O
-
144 (Not used)
PCC Reset/DMA Request
-
(Open)
145 (Not used)
PCC Buffer Control/DMA acknowledge0
-
(Open)
146 SH_FPG_WAIT
Hardware Wait Request
I
Wait with L
147 RESETM
Manual Reset Reuest
I
-
148 Reserved
Analog Trigger/Inout Port H
(Open)
149 (Not used)
I
Not used
150 ASEMD0 [for ICE]
ASE Mode
I
-
151 ASEBRKAK [for ICE]
ASE Brake
O
-
152 (Not used)
I
-
153 AUDATA[3] [for ICE]
AUD data
O
-
154 AUDATA[2] [for ICE]
AUD data
O
-
155 GND
Power (0V)
-
-
156 AUDATA[1] [for ICE]
AUD data
O
-
157 1.9V
Power (1.9V)
-
-
158 AUDATA[0] [for ICE]
AUD data
O
-
159 GND
Power for Inout/Output(0V)
-
-
160 TRST [for ICE]
Teset Reset
I
-
161 3.3V
Power for Inout/Output(3.3V)
-
-
162 TMS [for ICE]
Test Mode Switch
I
-
163 TDI [for ICE]
Test Data Input
I
-
164 TCK [for ICE]
test Clock
I
-
165 (Not used)
I
-
166 ---
PCCREG/Input Port F/Reserved
I
(Open)
167 LAMP_DET
Lamp Fail Detection
I
Lamp Failure Detection until Dimmer Starts
168 (Not used)
I
169 MD0
Clock Mode Setting [Default:L]
I
Switch
170 1.9V
PLL1 Power (1.9V)
-
-
171 CAP1
PLL1 External Condenser
-
[470pF]
172 GND
PLL1 Power (0V)
-
-
173 GND
PLL2 Power (0V)
-
-
174 CAP2
PLL2 External Condenser
-
[470pF]
175 1.9V
PLL2 Power (1.9V)
-
-
176 AUDCK [for ICE]
AUD Clock
I
-
177 GND
Power (0V)
-
-
178 1.9V
Power (1.9V)
-
-
179 Reserved
Clock Oscillator
-
(Open)
180 EXTAL
Extarnal Click/X’TAL
I
-
181 (Not used)
Not used (Input Port)
I
182 BOX_SW
Detect on/Off for PJ-Net Board
I
L: Yes H: No
183 FPGA_nSTATUS
Error Detection during the Configuration
I
H:Error
184 FPGA_CONF_DONE
OK Detection during the Configuration
I
H:OK
185 SH_FLASH_WP
Flash IC Write Protect
O
L: Protect
186 PFC_SW_EX
PFC_SW
O
187 SH_R_STB
Control for R-S&H IC
O
Select L
188 GND
Power for Inout/Output(0V)
-
-
189 CKIO
System Clock IO
I/O
-
190 3.3V
Power for Inout/Output(3.3V)
-
-
191 SH_LB_UART
Dimmer Control
O
H: Lamp On
192 (Not used)
Serial Clock0/IO Port for SCI
-
(Open)
Control Port Functions
Summary of Contents for PLV-75 Series
Page 68: ... 68 IC Block Diagrams AD9882 AV A D IC8201 AD8183 AD8185 Selector IC3001 IC2002 ...
Page 69: ... 69 IC Block Diagrams BA7078 Sync Separator IC3007 BH3540 Audo Amplifier IC1652 ...
Page 70: ... 70 IC Block Diagrams L3E06110 S H IC501 IC531 IC561 FA5502 P F Control IC601 ...
Page 72: ... 72 LB1645 Motor Drive IC1631 M62320 I O Expander IC5871 IC5872 IC Block Diagrams ...
Page 73: ... 73 M62399 D A IC1501 IC7801 M62393 D A IC281 IC Block Diagrams ...
Page 74: ... 74 PW388 Scan Converter System COntrol IC301 SP3232 RS 232C Driver IC3801 IC Block Diagrams ...
Page 76: ... 76 IC Block Diagrams TE7780 I O Expander IC4801 ...
Page 114: ... MB4A Jul 2006 DC 350 Printed in Japan SANYO Electric Co Ltd ...
