– 40 –
MAIN SHEET BLOCK DIAGRAM & PERIPHERICALS
NAND Flash
( 1Gb)
TV CPU
Video1(Composite/S)
TV Speakers
(10W+10W)
RESET
JTAG
S/P DIF
IR
UART
Remote
Back Light cont. (BLON)
Panel Unit
Digital/
Analog
Tuner
RF-IN
I
2
C
Back Light level (PWM)
RS-232C
HDMI1
(or DVI)
Power LED
RES
E
T
I
2
C
DDR2
1Gb (533MHz) x 2
USB1
IF
CPU
(MIPS)
DEMUX
HDMI
Rx
MPEG2 /
H.264 / VC1
Video
Decode
OSD
NTSC
Decoder
Audio
DAC
Audio
Processing
Unit
LVDS
Out
NTSC
Demod.
Video
ADC
Video Post
Processing
Scaler
8VSB/QAM
Demod.
BTSC
Decoder
AC-3
Decoder
Power On/Off
Line Out
VCC cont.
Line out mute.
TV CPU
EEPROM
HDMI2
TMDS
I
2
C
TMDS
I
2
C
VGA
H
BCM3549
S-Detect
Video2 (Component)
USB2.0
54MHz
EEPROM
+5V
+12V
+24V
+3.3 / Stand-by 5V
+1.2 / 1.8 / 2.5 / 9 /12V
+5 / 13.5V
I
2
C
Light Sensor
+5V
fault
Panel cont.
Write protect
I
2
C
to write data
into EEPROM
Keys
For Factory use
(7pin I/F)
S/W update
USB Power SW
Amp
mu
te
.
USB2
Ether
I2C
(for debug)
V
Video3(Component/
Composite)
Audio1
Audio2
Audio3 (DVI)
PC Audio
CEC
Ethernet
MAC/PHY
USB2.0
MAC/PHY
I2
S
Audio
Amp.
HDMI3
HDMI4
(optional)
HDMI
SWITCH
I
2
C
TMDS
Frame Rate
Convertor
Board
(60
120Hz)
Video data & clock
(LVDS)
I
2
C
Cont.
Power
for BL
Power for T-CON
