16
SCHEMATIC DIAGRAM
A
A
B
B
C
C
D
D
E
E
4
4
3
3
2
2
1
1
JTAG HEADER
Delete Component
/RST_SiI9190
2. Pin No. E24 : add to Pull down resistor
1. Pin No. E26, C19, B19, C20 --> N.C
4. Pin No. AC19 : slave SDA --> Master SDA
3. Pin No. AF14 : add to Pullup resistor
Change List
5. Pin No. AD21 : slave SCL --> M
aster SCL
6. Pin No. AE10 : E5_GPIO2 --> slave SCL
7. Pin No. AE9 : E5_GPIO3 --> slave
SDA
8. Pin No. AE19 : E5_SIO IRRX --> Mas
ter INT
(Reserve)
(Reserve)
(ATN_FM)
(ETHNET)
(FP SCLK)
(POWER DOWN LOADER)
(RDY_FM)
E5_SDRAM_CS1
(FLASH)
(FP D_HOST)
(FP D_FM)
(Ain_Sel2)
(Ain_Sel1)
(Reset Audio and BTSC)
2.5V
3.3V
5V
1.8V
(/RST_VI)
(MUTE)
(INT_VI)
(BIO_PHY_PD)
(To HDMI_INT)
Caps with smaller capacitance values to be
closer to respective power pins compared to
those of larger values. All should
be as
close as possible.
General decoupling cap placemen
t:
(/RST_PHY)
(Input only)
(Input only)
(NC)
(NC)
(/ETHER_IRQ)
(NC)
(NC)
(NC)
E5_UART1_RX
E5_UART
1
_
T
X
E5_SPI_CS3
E5_SPI_CS2
E5_GPIO7
E5_GPIO6
E5_GPIOx32
E5_GPIO3(SDA)
E5_GPIOx31
SDA(MASTER)
SCL(MASTER)
INT(MASTER)
E5_UART2_RX
E5_UART
2
_T
X
E5_TDO
E5_GPIOx29
E5_GPIOx35
E5_GPIO5
E5_GPIO2(SCL)
E5_GPIO4
E5_GPIO1
E5_GPIO0
MCONFIG
E5_/DTACK
/E5_CS2
/E5_CS1
/E5_CS0
/WAIT
E5_TMS
ATAPI2_DATA9
VOCLK
VO_22
E5_AI_FSYNC
ATAPI1_DATA8
ATAPI1_DATA11
ATAPI2_ADD3
VO_18
VI_D0
E5_TCK
E5_SDRAM_DQ26
E5_SDRAM_DQ23
E5_SDRAM_DQ18
E5_SDRAM_DQ11
E5_SDRAM_DQ15
E5_SDRAM_DQ2
ATAPI1_DATA0
ATAPI1_DATA7
VO_D2
ATAPI2_DATA7
VOVSYNC
VO_13
VO_11
VO_20
AO_0
ATAPI1_DATA3
ATAPI1_DATA6
ATAPI1_DATA9
ATAPI1_DATA12
ATAPI1_DATA15
VO_D22
VI_D6
E5_GPIOx35
AO_2
E5_SDRAM_DQ8
ATAPI1_DATA14
ATAPI1_ADD4
HD5
HD13
/E5_CS1
VO_D0
E5_TRST
_
L
E5_AI_MCLKO
ATAPI2_DATA8
E5_AO_SCLK
E5_SDRAM_DQ30
E5_SDRAM_DQ20
HD0
E5_TCK
VO_D15
E5_AO_MCLKO
ATAPI2_DATA4
ATAPI2_ADD2
VOHSYNC
VO_5
VO_1
E5_SDRAM_DQ28
E5_SDRAM_DQ24
E5_SDRAM_DQ9
E5_SDRAM_DQ3
ATAPI1_ADD2
VO_D7
VO_D9
VO_D5
VO_D12
ATAPI2_DATA0
VOE
VO_12
VO_19
VO_17
E5_TMS
ATAPI1_DATA2
ATAPI1_DATA4
VO_7
VO_4
VI_D9
E5_SDRAM_DQ25
E5_SDRAM_DQ7
E5_GPIO4
MCONFIG
E5_GPIOx34E5_GPIOx34
VO_D19
ATAPI2_DATA6
ATAPI2_DATA15
VI_CLK0
VI_D7
VI_D1
E5_SDRAM_DQ29
E5_SDRAM_DQ19
E5_SDRAM_DQ0
E5_/DTACK
VO_D8
VO_D3
VO_D13
ATAPI2_ADD0
VO_8
VO_2
VI_VSYNC
CLK_E5_CLKI
E5_SDRAM_DQ10
ATAPI1_ADD1
VO_D6
VO_D16
ATAPI2_DATA2
ATAPI2_DATA3
ATAPI2_DATA11
VO_9
VO_3
VI_D5
E5_SDRAM_DQ22
E5_SDRAM_DQ12
E5_SDRAM_DQ1
ATAPI1_DATA5
HD2
VO_D1
VO_15
VO_6
VI_D3
VI_D2
CLK_E5_CLKX
E5_AI_SCLK
E5_AO_LRCK
AO_1
E5_SDRAM_DQ5
ATAPI1_ADD3
HD12
/E5_CS2
E5_TDI
VO_D23
VO_D20
ATAPI2_DATA13
VI_D8
E5_SDRAM_DQ31
E5_SDRAM_DQ16
E5_GPIO5
ATAPI1_DATA13
HD6
HD8
HD14
HD15
VO_D10
VO_D14
ATAPI2_DATA10
ATAPI2_DATA12
VO_0
VO_23
VO_16
ATAPI1_DATA10
ATAPI1_ADD0
VO_D18
ATAPI2_DATA5
E5_TRST
_
L
E5_SDRAM_DQ21
E5_SDRAM_DQ17
E5_SDRAM_DQ4
HD4
VO_D11
VO_D17
ATAPI2_ADD1
VO_14
VO_21
E5_TDO
AO_3
E5_SDRAM_DQ27
E5_SDRAM_DQ14
ATAPI1_DATA1
HD11
VO_D21
/WAIT
ATAPI2_DATA14
VO_ACTIVE
VO_10
VI_D4
E5_TDI
E5_AO_IEC958
E5_SDRAM_DQ13
E5_SDRAM_DQ6
HD1
HD3
HD7
HD9
HD10
VO_D4
ATAPI2_DATA1
ATAPI2_ADD4
BIO_PHY_CTL0
9
BIO_LREQ
9
E5_GPIOx33
12
E5_UART2_TX
7
ATAPI1_DATA[15..0]
8
VI_CLK0
11
VI_VSYNC
E5_GPIOx40
12
ATAPI1_ADD[4..0]
8
AO_D0
7,12
AO_D3
12
AO_D2
12
AO_D1
12
AO_SCLK
7,12
AO_FSYNC
7,12
ATAPI2_DATA[15..0]
8
ATAPI1_DMARQ
8
ATAPI1_IORDY
8
ATAPI1_DMAACK_L
8
ATAPI1_DIOW_L
8
ATAPI1_INTRQ
8
ATAPI1_DIOR_L
8
E5_SDRAM_CS0
5
INT(MASTER)
7
E5_SDRAM_DQM2
5
E5_SDRAM_DQM1
5
E5_SDRAM_DQM0
5
E5_SDRAM_DQM3
5
E5_SDRAM_DQS1
5
E5_SDRAM_DQS3
5
E5_SDRAM_DQS0
5
E5_SDRAM_DQS2
5
E5_GPIOx29
12
VO_D[23..0]
12
E5_SPI_CLK
8
E5_SPI_MOSI
8
E5_SPI_MISO
8
E5_SPI_CS2
HD[15..0]
7,8
/RST_ATAPI1
8
/RST_ATAPI2
8
VO_VSYNC
1
2
VO_HSYNC
12
VO_DE
12
E5_GPIO7
E5_M
A
1
7
,8
E5_M
A
4
7
,8
E5_M
A
2
7
,8
E5_M
A
37
,8
E5_M
A
5
7
,8
E5_MA
2
2
8
VO_CLK
12
/E5_CS0
8
AI_D0
7
/SYS_RST
7,8
VREF
5,6
E5_ALE
7,8
E5_GPIOx45
E5_GPIO3(SDA)
E5_GPIO0
E5_GPIO1
E5_GPIO2(SCL)
7
E5_GPIO5
E5_GPIO4
USB_D0-
9
USB_OC0
9
9
USB_PO0
9
E5_SDRAM_A7
5
E5_SDRAM_A5
5
E5_SDRAM_A6
5
E5_SDRAM_A1
5
E5_SDRAM_A3
5
E5_SDRAM_A14
5
E5_SDRAM_A10
5
E5_SDRAM_A11
5
E5_SDRAM_A8
5
E5_SDRAM_A0
5
E5_SDRAM_A2
5
E5_SDRAM_A4
5
E5_SDRAM_A9
5
E5_SDRAM_A15
5
E5_SDRAM_A12
5
AO_IEC958
7,12
E5_GPIOx35
9
E5_GPIO6
AI_SCLK
7
AI_FSYNC
7
AI_MCLKO
7
E5_SDRAM_DQ[31..0]
5
E5_UART2_RX
7
ATAPI2_ADD[4..0]
8
SCL(MASTER)
7,8,12
SDA(MASTER)
7,8,12
/E5_WEL
7,8
/E5_OE
7,8
9
USB_D1-
9
USB_PO1
9
USB_OC1
9
VI_D[9..0] 2
11
E5_GPIOx36
9
E5_SDRAM_CLK#0
5
E5_SDRAM_CLK0
5
E5_SDRAM_CLK1
5
E5_SDRAM_CAS#
5
E5_SDRAM_WE#
5
E5_SDRAM_RAS#
5
E5_SDRAM_CLK#1
5
E5_SDRAM_CLKE
5
/E5_WEL
7,8
E5_SPI_CS3
8
E5_GPIOx31
E5_GPIOx34
AO_MCLKO
7,12
E5_GPIOx32
12
Pr/R_Out
7
BIO_LPS
9
Y/G_Out
7
BIO_LINK_ON
9
BIO_PHY_DATA4
9
Pb/B_Out
7
BIO_PHY_DATA3
9
Y_Out
7
BIO_PHY_DATA2
9
BIO_PHY_DATA5
9
BIO_PHY_CTL1
9
C_Out
7
BIO_PHY_CLK
9
BIO_PHY_DATA0
9
CVBS_Out
7
BIO_PHY_DATA1
9
BIO_PHY_DATA6
9
BIO_PHY_DATA7
9
ATAPI2_IORDY
8
ATAPI2_DIOW_L
8
ATAPI2_DMARQ
8
ATAPI2_DIOR_L
8
ATAPI2_DMAACK_L
8
ATAPI2_INTRQ
8
GND
E5_AVDD
E5_V5BIAS
GND
E5_VPAD
E5_VPAD
SSTL2_VDD
E5_VCORE
E5_VPAD
GND
GND
E5_VPAD
E5_VPAD
GND
E5_VPAD
GND
V33_E5_DAC_AVDD
GND
VCC
E5_V5BIAS
V25
E5_VPAD
V18
SSTL2_VDD
E5_VPAD
V18_E5_DAC_DVDD
V33_E5_DAC_AVDD
V33_E5_USB
E5_VDDREF
E5_AVDD
GND
GND
E5_VCORE
E5_VCORE
E5_AVDD
E5_VPAD
E5_VDDREF
E5_AVDD
GND
GND
GND
GND
GND
GND
SSTL2_VDD
GND
VO_GND
GND
V33_E5_USB
E5_VPAD
GND
VO_GND
E5_VDDREF
V18_E5_DAC_DVDD
GND
GND
GND
RN02
22
RN03
22
RN04
22
RN01
22
RN28
10K
RN22
22
RN21
22
RN20
22
RN16
22/RP
1
8
2
7
3
6
4
5
CN01
15P
XN0
1
13.5MHZ
CN02
15P
CN06
0.1UF
+
CN05
100UF/10V
JP9
TCON_06/2.0mm
1
2
3
4
5
6
CN59
0.1UF
RN52
1
0K
RN19
4.7K
RN50
10K
RN51
10K
RN18
22/RP
4
5
3
6
2
7
1
8
+
CN09
10UF/6V/A
ADDR
DATA
SIO
SDRAM I/F
RST-
MASTER
SLAVE
MCONFIG
CS-
RD-
DMAREQ
A0
A1
A2
HINT-
RD
WAIT-
DTACK-
D31
D30
D29
D28
D27
D26
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D4
D3
D2
D1
D0
UDS-
LDS-
PCMCIA_IOW-
PCMCIA_IOR-
WR-
D25
D24
D23
D22
D21
D20
D19
D18
MA[21]
MA[20]
MA[19]
MA[18]
MA[17]
MA[16]
MA[15]
MA[14]
MA[13]
MA[12]
MA[11]
MA[10]
MA[9]
MA[8]
MA[7]
MA[6]
CONTROL
ATAPI2 I/F
ATAPI I/F
SD/CD
SBP
SBP_D[7]
SBP_D[6]
SBP_D[5]
SBP_D[4]
SBP_D[3]
SBP_D[2]
SBP_D[1]
SBP_D[0]
SD_ERROR
SD_SECSTART
SBP_CLK
SBP_REQ
SBP_RD
SBP_ACK
SBP_FRAME
SD_D[0]
SD_D[1]
SD_D[2]
SD_D[3]
SD_D[4]
SD_D[5]
SD_D[6]
SD_D[7]
SD_CLK
SD_ACK
SD_RDREQ
SD_WRREQ
DATA
ADDR
CONTROL
IDC
UART1
UART2
SPI
IR
CS10-
CS11-
GPIOx[25]
GPIOx[24]
VDENC
012
CPST
Y
-
C
CPST
-
G/Y
Y
-
B/Pb
C
CPST
R/Pr
C
CPST
SEL
2nd
24-bit
VI_D0
VI_D1
VI_D2
VI_D3
VI_D4
VI_D5
VI_D6
VI_D7
VI_D8
VI_D9
VO_D16
VO_D17
VO_D18
VO_D19
VO_D20
VO_D21
VO_D22
VO_D23
VIO
VIN
JTAG
SYSTEM
GPIOx[31]
GPIOx[34]
GPIO[7]
GPIO[6]
AIN
AOUT
GPIOx[35]
CS[9]-
CS[8]-
USB
1394
POWER
GND
PADS
CORE
SDRAM
SDR
DDR
3.3V
2.5V
5
V
BIAS
3.3V
1.8V
3.3V
PLL
PLL
VREF
GPIOx[43]
GPIOx[44]
GPIOx[23]
GPIOx[22]
GPIOx[21]
GPIOx[20]
GPIOx[19]
GPIOx[18]
GPIOx[17]
GPIOx[16]
CD_DATA
CD_LRCK
CD_BCK
CD_C2PO
vout
vin
YC
P
S
T
-
TOP VIEW
2nd
VO_D0
VO_D7
VO_D6
VO_D5
VO_D4
VO_D3
VO_D2
VO_D1
vout
VI_D10
VI_D11
VI_D12
VI_D13
VI_D14
VI_D15
20-bit
vin
All the singals with * and
the ATAPI-2 I/F are not
available in 308-pin package
NOTE:
E5.1-BGA-388-A
J3
AE19
L4
M4
M3
J2
J1
K3
K2
J4
L3
L2
L1
H3
K1
AC12
AC7
D21
C21
T16
R16
AC13
AC14
AC15
D14
D15
D19
D20
P4
R4
T4
AA4
AA23
AC6
AC21
D11
D12
D13
C22
D23
M23
N24
P24
R24
T24
U23
C23
L11
L12
L13
L14
L15
L16
M11
M12
M13
M14
M15
M16
N11
N12
N13
N14
N15
N16
P11
P12
P13
P14
P15
P16
R11
R12
R13
R14
R15
T11
T12
T13
T14
T15
AF5
AE5
AF19
AF18
AF17
AF16
AE6
AC8
AF6
AD7
AE7
AF7
AD9
AC9
AE8
AF8
AD11
AE12
AF11
AC11
AF12
AE13
AE11
AD14
AE15
AD13
AD16
AC16
AE17
AD15
AE16
AD17
D10
Y1
V1
V4
R1
W2
W3
T3
Y2
W1
V3
U4
P1
W4
V2
U2
T2
R3
P2
N1
M1
M2
N2
N3
P3
R2
T1
U1
U3
AF15
AF13
AE18
AC17
AE14
AE10
AE9
AD8
AF9
AF14
AF10
AD10
AD21
AC19
AF22
AE23
AC22
AE24
AC20
AF24
AE20
AF23
AE22
AD22
AF21
AE21
AC18
AD18
AD20
AD19
AF20
D3
D2
D5
D4
B1
B3
C3
C5
C4
B2
D1
C1
C2
Y25
W24
V23
Y26
V24
W26
V25
V26
N25
U26
R26
P26
T25
P25
T26
U25
M25
M24
L26
L25
L23
K26
K25
K24
H23
G26
H24
H25
J24
J25
J23
J26
W25
U24
R25
L24
H26
N26
M26
K23
AC25
AB23
AA24
AC26
AB24
AD25
AD26
AE25
AC23
AF25
AD24
AE26
AC24
AF26
AD23
AB25
AA25
Y24
W23
AA26
N23
P23
R23
T23
D22
G24
G23
F26
G25
F24
E25
F25
E23
D25
A23
B25
E26
D26
E24
D24
C26
B24
A1
A2
H1
H4
C9
D9
B8
A9
B7
D8
C7
C19
B19
B23
B22
A22
B21
C25
B26
C24
A26
B16
C16
D16
B17
C17
D17
B18
C18
A19
D18
B20
A21
A17
A20
C20
A18
A10
B10
B11
A11
C11
C12
B12
A12
B13
A13
C13
C14
B14
A14
A15
C15
B15
C10
B9
C8
A16
AB26
Y23
AD6
AF3
AC5
AE4
AF4
AD5
AD4
AE2
AD3
AC4
AF2
AE3
AF1
AE1
AD2
AC3
AB4
AD1
AC2
AB3
AC1
AB2
AA3
AB1
AA2
Y4
AA1
Y3
E2
E1
G1
G2
F2
F1
G3
G4
A3
B4
A4
B5
A5
A6
C6
A7
D6
AD12
AC10
A24
A25
H2
D7
B6
A8
E4
F4
E3
F3
F23
K4
N4
BIO_PHY_DATA0
IRRX
BIO_PHY_DATA1
BIO_PHY_DATA2
BIO_PHY_DATA3
BIO_PHY_DATA4
BIO_PHY_DATA5
BIO_PHY_DATA6
BIO_PHY_DATA7
BIO_PHY_CTL0
BIO_PHY_CTL1
BIO_LREQ
BIO_LPS
BIO_LINK_ON
BIO_PHY_CLK
VDD_PAD1
5V_BIAS0
5V_BIAS1
VSS_PC2_CTR1
VSS_PC2_CTR37
VSS_PC2_CTR38
VDD_PAD2
VDD_PAD3
VDD_PAD4
VDD_PAD5
VDD_PAD6
VDD_PAD7
VDD_PAD8
VDD_PAD9
VDD_PAD10
VDD_PAD11
VDD_CORE1
VDD_CORE2
VDD_CORE3
VDD_CORE4
VDD_CORE5
VDD_CORE6
VDD_CORE7
VDD_25V1
VDD_25V2
VDD_25V3
VDD_25V4
VDD_25V5
VDD_25V6
VDD_25V7
VDD_25V8
VSS_PC2_CTR2
VSS_PC2_CTR3
VSS_PC2_CTR4
VSS_PC2_CTR5
VSS_PC2_CTR6
VSS_PC2_CTR7
VSS_PC2_CTR8
VSS_PC2_CTR9
VSS_PC2_CTR10
VSS_PC2_CTR11
VSS_PC2_CTR12
VSS_PC2_CTR13
VSS_PC2_CTR14
VSS_PC2_CTR15
VSS_PC2_CTR16
VSS_PC2_CTR17
VSS_PC2_CTR18
VSS_PC2_CTR19
VSS_PC2_CTR20
VSS_PC2_CTR21
VSS_PC2_CTR22
VSS_PC2_CTR23
VSS_PC2_CTR24
VSS_PC2_CTR25
VSS_PC2_CTR26
VSS_PC2_CTR27
VSS_PC2_CTR28
VSS_PC2_CTR29
VSS_PC2_CTR30
VSS_PC2_CTR31
VSS_PC2_CTR32
VSS_PC2_CTR33
VSS_PC2_CTR34
VSS_PC2_CTR35
VSS_PC2_CTR36
CS5-
CS4-
CS3-
CS2-
CS1-
CS0-
MA[26]
MS[25]
MA[24]
MA[23]
MA[22]
MA[5]
MA[4]
MA[3]
MA[2]
MA[1]
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
MCONFIG
ATAPI_RESET_L
ATAPI_DMAACK_L
ATAPI_DMARQ
ATAPI_IORDY
ATAPI_INTRQ
ATAPI_DIOR_L
ATAPI_DIOW_L
AtapiAddr0
AtapiAddr1
AtapiAddr2
AtapiAddr3
AtapiAddr4
ATAPI_DATA15
ATAPI_DATA14
ATAPI_DATA13
ATAPI_DATA12
ATAPI_DATA11
ATAPI_DATA10
ATAPI_DATA9
ATAPI_DATA8
ATAPI_DATA7
ATAPI_DATA6
ATAPI_DATA5
ATAPI_DATA4
ATAPI_DATA3
ATAPI_DATA2
ATAPI_DATA1
ATAPI_DATA0
ALE
OE-
RST-
UWE-
GPIO1
GPIO2
GPIO3
GPIO0
GPIO4
LWE-
GPIO5
DTACK-
IDC_CLK
IDC_DAT
UART2_RX
UART2_TX
*UART2_CTS
*UART2_RTS
UART1_RX
UART1_TX
UART1_CTS
UART1_RTS
SPI_MOSI
SPI_MISO
SPI_CS0
SPI_CS1
SPI_CS2
SPI_CLK
*SPI_CS3
IRTX1
*IRTX2
AVDD0
AVDD1
AVDD2
AVDD3
VDDX
AGND0
AGND1
AGND2
AGND3
GNDX
VDD_REF
R_REF
VSS_REF
SDRAM_DQ2
SDRAM_DQ1
SDRAM_DQ0
SDRAM_DQ3
SDRAM_DQ4
SDRAM_DQ5
SDRAM_DQ6
SDRAM_DQ7
SDRAM_DQ15
SDRAM_DQ9
SDRAM_DQ12
SDRAM_DQ14
SDRAM_DQ10
SDRAM_DQ13
SDRAM_DQ11
SDRAM_DQ8
SDRAM_DQ16
SDRAM_DQ17
SDRAM_DQ18
SDRAM_DQ19
SDRAM_DQ20
SDRAM_DQ21
SDRAM_DQ22
SDRAM_DQ23
SDRAM_DQ24
SDRAM_DQ25
SDRAM_DQ27
SDRAM_DQ26
SDRAM_DQ28
SDRAM_DQ29
SDRAM_DQ30
SDRAM_DQ31
SDRAM_DQS0
SDRAM_DQM0
SDRAM_DQS1
SDRAM_DQS2
SDRAM_DQS3
SDRAM_DQM1
SDRAM_DQM2
SDRAM_DQM3
SDRAM__A0
SDRAM__A1
SDRAM__A2
SDRAM__A3
SDRAM__A4
SDRAM__A5
SDRAM__A6
SDRAM__A7
SDRAM__A8
SDRAM__A9
SDRAM__A10
SDRAM__A11
SDRAM__A12
*SDRAM__A13
SDRAM__A14
SDRAM__A15
SDRAM_CAS_L
SDRAM_RAS_L
SDRAM_CKE
SDRAM_WE_L
SDRAM_CLK0
SDRAM_CLK_L0
SDRAM_CLK1
SDRAM_CLK_L1
SDRAM_VREF
AO_D0
AO_D1
AO_D2
AO_D3
AO_SCLK
AO_FSYNC
AO2_D0*
A2_SCLK*
A2_FSYNC*
AO_IEC958
AO_MCLKI
AI2_D*
AI_D0
AI_D1
AI_SCLK
AI_FSYNC
AI_MCLKI
CLKI
CLKX
CLKO
BYPASS
_PLL
RSTO*
EPD_L*
TCK
TDI
TDO
TMS
TRST_L
VI_D0
VI_D1
VI_D2
VI_D3
VI_D4
VI_D5
VI_D6
VI_D7
VI_D8
VI_D9
VIO_D0*
VIO_D1*
VIO_D2*
VIO_D3*
VIO_D4*
VIO_D5*
VIO_D6*
VIO_D7*
VIO_D8*
VIO_D9*
VI_E0
VI_VSYNC0
VI_CLK0
VI_E1
VI_VSYNC1*
VI_CLK1*
VO_D0
VO_D1
VO_D2
VO_D3
VO_D4
VO_D5
VO_D6
VO_D7
VO_D8*
VO_D9*
VO_D10*
VO_D11*
VO_D12*
VO_D13*
VO_D14*
VO_D15*
VO_E*
VO_ACTIVE*
VO_HSYNC*
VO_VSYNC*
VO_CLK
SDRAM__A17
SDRAM__A16
ATAPI2_RESET_L
ATAPI2_DMAACK_L
ATAPI2_DMARQ
ATAPI2_IORDY
ATAPI2_INTRQ
ATAPI2_DIOR_L
ATAPI2_DIOW_L
Atapi2Addr0
Atapi2Addr1
Atapi2Addr2
Atapi2Addr3
Atapi2Addr4
ATAPI2_DATA15
ATAPI2_DATA14
ATAPI2_DATA13
ATAPI2_DATA12
ATAPI2_DATA11
ATAPI2_DATA10
ATAPI2_DATA9
ATAPI2_DATA8
ATAPI2_DATA7
ATAPI2_DATA6
ATAPI2_DATA5
ATAPI2_DATA4
ATAPI2_DATA3
ATAPI2_DATA2
ATAPI2_DATA1
ATAPI2_DATA0
Dplus_0
Dminus_0
Host_PO_0
Host_OC_0
Dplus_1*
Dminus_1*
Host_PO_1*
Host_OC_1*
DAC1
DAC0bar
DAC2
DAC1bar
DAC3
DAC4
DAC_Vdd0(3.3v)
DAC5
DAC_Vdd1(3.3v)
CS0_8BIT
WAIT-
AI_MCLKO
AO_MCLKO
USB_48MHZ*
DAC_Dvdd (1.8v)
DAC_Dvss
DAC6
USB_Avdd0(3.3v)
USB_Avdd1(3.3v)
USB_VSS0
USB_VSS1
VDD_CORE8
VDD_CORE9
VDD_CORE10
RN13
22/RP
1
8
2
7
3
6
4
5
RN14
22/RP
1
8
2
7
3
6
4
5
SKT-U3
SKT-BGA3
8
8
RN17
22/RP
4
5
3
6
2
7
1
8
RX
2
1
RN05
22
RN06
22
TX
2
1
CN10
0.1UF
CN60
0.1UF
RN08
22
CN08
0.01UF
RN24
1.2K 1%
CN07
0.1UF
DN02
IN4148
1
2
DN01
IN4148
1
2
RN07
22
LN04
FBMJ2125HS420-T
LN03
FBMJ2125HS420-T
CN55
0.1UF
+
CN56
10UF/6V/A
CN58
0.1UF
LN01
FBMJ2125HS420-T
LN05
FBMJ2125HS420-T
LN02
FBMJ2125HS420-T
RX
1
1
TX
1
1
RN10
22
RN09
22
RN42
1
0K
RN49
10K
RN11
22
RN15
22/RP
1
8
2
7
3
6
4
5
RN23
22
RN26
10K
RN27
10K
RN25
10K
CN04
0.01UF
RN29
1
0K
RN43
10K
RN46
10K
CN23
0.1UF
RN44
10K
+
CN21
10UF/6V/A
RN47
10K
CN33
0.01UF
RN45
10K
CN32
0.01UF
R544
33
CN11
1000PF
RN48
10K
CN26
0.1UF
CN13
1000PF
CN12
1000PF
CN24
0.01UF
CN25
0.01UF
RN39
1
0K
CN22
0.01UF
CN14
0.1UF
RN38
1
0K
+
CN34
10UF/6V/A
RN40
1
0K
CN27
1000PF
CN49
0.1UF
RN37
1
0K
+
CN35
10UF/6V/A
CN50
0.1UF
CN51
0.1UF
CN54
0.1UF
CN28
0.1UF
CN36
0.1UF
RN36
1
0K
CN53
0.1UF
CN37
0.1UF
RN41
1
0K
RN34
1
0K
CN40
0.1UF
RN35
1
0K
CN38
0.1UF
CN41
0.1UF
RN32
1
0K
CN39
0.1UF
RN33
1
0K
+
CN48
10UF/6V/A
RN30
10K
+
CN47
10UF/6V/A
CN03
0.1UF
CN46
0.1UF
CN45
0.01UF
CN15
0.1UF
CN16
0.1UF
CN31
1000PF
+
CN20
10UF/6V/A
RN12
22
CN18
0.1UF
CN17
0.1UF
CN19
0.1UF
CN30
1000PF
CN43
1000PF
CN29
1000PF
CN44
1000PF
CN42
1000PF
00-32̲HVR-DX700-710.indd 17
00-32̲HVR-DX700-710.indd 17
2006/10/12 11:37:24
2006/10/12 11:37:24
Summary of Contents for HVR-DX700
Page 9: ...8 SCHEMATIC DIAGRAM ...
Page 10: ...9 SCHEMATIC DIAGRAM ...
Page 11: ...10 SCHEMATIC DIAGRAM ...
Page 12: ...11 SCHEMATIC DIAGRAM ...
Page 13: ...12 SCHEMATIC DIAGRAM ...
Page 14: ...13 SCHEMATIC DIAGRAM ...
Page 15: ...14 SCHEMATIC DIAGRAM ...
Page 16: ...15 SCHEMATIC DIAGRAM ...
Page 25: ...24 PCB CIRCUIT BOARD A PCB MAIN TOP ...
Page 26: ...25 PCB CIRCUIT BOARD B PCB MAIN BOTTOM ...
Page 27: ...26 PCB CIRCUIT BOARD C MPEG PCB TOP ...
Page 28: ...27 PCB CIRCUIT BOARD D MPEG PCB BOTTOM ...
Page 29: ...28 PCB CIRCUIT BOARD E POWER PCB BOTTOM ...
Page 30: ...29 PCB CIRCUIT BOARD LOGIC PCB PANEL 1 ...