Sanyo DP32647, Service Manual

Page: 28 / 50

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BLOCK DIAGRAM SIGNAL LINES
AV
1
Composite Video
S Video
A
udio
AV
2
A
udio
Component Video
AV
3
Digital Au
d
io
Output
A
udio
Component Video
TV
(A6100)
Digital/Analog
Tuner
A
V1_V
AV
1_
Y
3
TV_V
4
IIC Bus
(TU)
IIC Bus (ZR)
IIC Bus (ZR)
IIC Bus (ZR)
Q101
1
Video SW
IC1201
SWD_CVBS
5
AV
1_
C
VFE_CIN
VFE_CVBS
Y3
L17-L20,
M17-M20
V3
VFE_YIN
W2
A
V1_C_SW
A
V2-Y
BLUE [0-7]
A
V2-CB
2
3
A
V2-CR
Q1201
Q1261
Q1262
A
V3-Y
A
V3-CB
A
V3-CR
A
udio SW
DIF-AMP
TS
Demodulator
IC1251
IC6300
IC6270
IC6100
SIF+MPX
det.
IC6250
A
V1_L/R
L:
14
R:
5
A
V2_L/R
L:
15
R:
2
A
V3_L/R
L:
11
R:
4
L:
12
R:
1
L:
23
R:
22
SIF_OUT
1
3
21
2
3
13
78
13
SWD
AD_R
SWD
AD_L
TV_L/R (L/R_IN)
31
2
DM_R DM_L
94
28 29 34
93
21
20
IF_OUT2
IF_OUT1
Q6100
12
68-75
U8-U11,
W8-W11
TPD
AT
A [0-7]
TPCLK
IIC_SEL
TPV
ALID
TPFRAME
36,39-41,
43,44,48,49
N16-N20,
P18-P20
GREEN [0-7]
90-97
P16,P17,
R17-R20,
T19,T20
RED [0-7]
112-119
P3
LR_CLK
P4
DA
TA
121
R3
B_CLK
125
R2
A_CLK
128
M4
C3 Y1
T3
R4 B2
T4
Y10
U7 V1
SYS_CLK
47
N4
DDXRA
5
7 1
U1
DDXRB
6
T1
DDXLA
3
T2
DDXLB
2
19
13
14
Q1200
7
26
28 22
A
udio AMP
IC001
LCD P
ANEL
CPU
IC801
B
US SW
IC6301
EPPR
OM
IC802
DDR-1
DDR:
Doub
le Data Rate SDRAM
IC5700
IC6551
HDMI-SW
IC6502
DDR-2
IC5720
Flash R
OM
IC5750
R
8, 9
R-OUT
5
A_OUT_L
A_OUT_R
28
4 2
23 10
L
IIC Bus (CPU)
IIC Bus (CPU)
IIC Bus (CPU)
IIC Bus (CPU)
IIC Bus (TU)
IIC Bus (TS)
R/G/B
(L
VDS)
SPEAKER
(Right)
11, 12
10
14
2 7
38 39
L-OUT
SPEAKER
(Left)
A
UDIO
OUT
A
udio
Control IC3200
A/D
Con
ver
ter
A/D
Con
ver
ter
IC6200
IC5500
Screen
Controller
BLOCK DIA
GRAM SIGNAL LINES
DP32746 / DP26746
Q5803,Q5804 Q5801,Q5802
Q6250,Q6251
K17
D
AT
A
CLK
U19
HSYNC_IN
U20
VSYNC_IN
HDMI_SW1
TMDS
HDMI_SW2
21 22
HPD_IN
IEC958
HDMI_SD
A
HDMI_SCL
K6500
HDMI
K6501
5 4
A_5V B_5V
TMDS
1
(A
)
2
(B
)