- 30 -
IC BLOCK DIAGRAM & DESCRIPTION
IC360 NJM2058M (Operational Amplifier)
S1/P1 to S4/P4
S5 to S39
COM1
COM2
COM3
COM4
Pin
Pin No.
Descriptions
I/O
1 to 4
5 to 39
40
41
42
43
O
O
Segment output pins for displaying the display
data transferred by serial data input.
The S1/P1 to S4/P4 pins can be used as general-
purpose output ports under control data.
Common driver output pins.
The frame frequency (fo) is given by :
fo=(fosc/512)Hz.
Key scan output pin.
When a Key matrix is to be formed, the diode is
normally installed to the timing line of the Key
scan to prevent short-circuit.
Such short-circuiting will not cause damage
because the impedance of output transistor is the
unbalance CMOS output. The KS1/S40, KS2/S41
pins can be used as segment output when so
specified by the control data.
KS1/S40,
KS2/S41
KS3 to KS6
44,
45
46 to 49
O
Key scan input pin at pull-down resistance is
built-in.
KI1 to KI5
50 to 54
I
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
27
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
S32
S31
S30
S29
S28
S27
S26
S25
S24
S23
S22
S21
S20
S19
S18
S17
KS6
K11
K12
K13
K14
K15
TEST
VDD
VDD1
VDD2
VSS
OSC
DO
CE
CL
DI
KS5
KS4
KS3
KS2/S41
KS1/S40
COM4
COM3
COM2
COM1
S39
S38
S37
S36
S35
S34
S33
P1/S1
P2/S2
P3/S3
P4/S4
S5
S6
S7
S8
S9
S10
S11
S12
S13
S14
S15
S16
56
57
59
58
1
2
3
4
5
43
42
41
40
39
55
61
60
64
63
62
TEST
DO
DI
OSC
VDD
VDD1
VDD2
VSS
COM1
COM2
COM3
COM4
S39
S5
S4/P4
S3/P3
S2/P2
S1/P1
44
45
46
47
48
49
50
51
52
53
54
K15
K14
K13
K12
K11
KS6
KS5
KS4
KS3
S41/KS2
S40/KS1
. . . . . . . . . . . . . .
. . . . . . . . . . . . . .
CL
CE
COMMON
DRIVER
SEGMENT DRIVER & LATCH
SHIFT REGISTER
KEY BUFFER
KEY SCAN
CLOCK
GENERATOR
CCB
INTERFACE
VDET
CONTROL
RESISTER
Pin
Pin No.
Descriptions
I/O
Oscillator pin, which, together with externally
connected resistor and capacitor, makes up an
oscillator circuit.
60
OSC
I/O
TEST
55
I
Connect to ground.
VDD1
57
I
Used for applying the LCD driver 2/3 bias voltage
exrernally. Must be connected to VDD2 when a 1/2
bias scheme is used.
VDD2
58
I
Used for applying the LCD driver 1/3 bias voltage
exrernally. Must be connected to VDD1 when a 1/2
bias scheme is used.
VDD
56
-
Power supply pin to provide a voltage between
4.5V to6.0V.
VSS
59
-
Power supply pin to connect to ground.
Oscillator pin, which, together with externally
connected resistor and capacitor, makes up an
oscillator circuit.
CE : Chip enable
CL : Synchronization clock
DI : Transfer data
DO : Output data
62
63
64
61
CE
CL
DI
DO
I
I
I
O
2
3
4
5
6
8
1
OUT A
-IN A
+IN A
V
EE
V
CC
OUT B
-IN B
+IN B
7
B
A
1
2
3
4
11
12
13
14
A OUTPUT
A +INPUT
V+
C+INPUT
A INPUT
B INPUT
D+INPUT
V
D INPUT
D OUTPUT
A
D
5
6
7
8
9
10
B+INPUT
B OUTPUT
C INPUT
C OUTPUT
B
C
IC330 KIA4558F (Dual Low Noise Operational
Amplifier)
IC601 LC75854E (LCD Driver)