Sanyo DC-M3, Service Manual

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IC BLOCK DIAGRAM & DESCRIPTION
IC241 LC72121M (PLL Synthesizer)
IC451 LC75342M
(2-ch Stereo Audio Power Amplifier)
Vdda
REFERENCE
VOLTAGE
3
4
2
20
21
22
23
7
8
9~11,16,17
1 5 6
14
15
19
18
24
13
12
ANTIALIASING
FILTER
57kHz
BPF
(SCF)
SMOOTHING
FILTER
VREF
PLL
(57kHz)
CLOCK
RECOVERY
(1187.5Hz)
DATA
DECODER
SYNC/EC CONTROLLER
ERROR CORRECTION
(SOFT DECISION)
R A M
(24 BLOCK DATA)
C C B
TEST
MEMORY CONTROL
CLK(4.332MHz)
OSC / DIVIDER
SYNC
DETECT-1
SYNC
DETECT-2
Vssa
MPXIN
DO
CL
DI
CE
T1
T2
T3~T7
XIN XOUT
Vddd
Vssd
RDS-ID
VREF FLOUT CIN
SYNC
SYR
IC251 LC72722 (RDS Signal Processor)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
30
29
28
27
26 25 24 23 22 21
20 19 18 17 16
DI
CE
VSS
TEST
LOUT
LBASS2 LBASS1
L
TRE
LIN
LSEL0
L4 L3 L2 L1
NC
CL VDD VREF NC ROUT RBASS2 RBASS1 R
TRE
RIN RSEL0 R4 R3 R2 R1 NC
5
7
9
11
1 6
2
3
10
8
4
MUTE/
ST-BY
IN (L)
IN (R)
IN- (L)
IN- (R)
GND
OUT (L)
OUT (R)
-Vs
+Vs
IC487 TDA7265
(25 + 25W Stereo Amplifier with Mute & ST-by)
IC415 LA2615 (Surround Signal Processor)
P16 P15 P14 P13 P12 P11 P10 P9
P1 P2 P3 P4 P5 P6 P7 P8
ANALOG
SURROUND
ATT LEVEL ON/OFF
VREF
A
A
B
B
SW
SW
Vcc
CONT1 CONT2 CONT3 GND HFFC VREF L-IN R-IN
GCR GLR POG LPFD NC VCC L-OUT R-OUT
Vdda
REFERENCE
VOLTAGE
3
4
2
20
21
22
23
7
8
9~11,16,17
1 5 6
14
15
19
18
24
13 12
ANTIALIASING
FILTER
57kHz
BPF
(SCF)
SMOOTHING
FILTER
VREF
PLL
(57kHz)
CLOCK
RECOVERY
(1187.5Hz)
DATA
DECODER
SYNC/EC CONTROLLER
ERROR CORRECTION
(SOFT DECISION)
R A M
(24 BLOCK DATA)
C C B
TEST
MEMORY CONTROL
CLK(4.332MHz)
OSC / DIVIDER
SYNC
DETECT-1
SYNC
DETECT-2
Vssa
MPXIN
DO
CL
DI
CE
T1
T2
T3~T7
XIN XOUT
Vddd
Vssd
RDS-ID
VREF
FLOUT CIN
SYNC
SYR