Sanyo DC-DV610KR, Service Manual

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IC BLOCK DIAGRAM & DESCRIPTION
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31
P8
6
/CLK
0
P8 5 /R X D 0
P8
4
/T
X
D
0
P8
3
/CTS
0
/RTS
0
P10
0
/A
0
P1 5 /D 5
P1
6
/D
6
P1
7
/D
7
P2
0
/D
6
P10
1
/A
1
P10
2
/A
2
P10
3
/A
3
P10
4
/A
4
P10
5
/A
5
P10
6
/A
6
P10
7
/A
7
P11
0
/A
8
/MA
0
P11
1
/A
9
/MA
1
P11
2
/A
10
/MA
2
P11
3
/A
11
/MA
3
P11
4
/A
12
/MA
4
P11
5
/A
13
/MA
5
P11
6
/A
14
/MA
6
P11
7
/A
15
/MA
7
P0
0
/A
16
/MA
8
P0
2
/A
18
/MA
9
P0
4
/A
20
/MA
10
P0
6
/A
22
/MA
11
P0
1
/A
17
P0
3
/A
19
P1
0
/D
0
P1
1
/D
1
P1
2
/D
2
P1
3
/D
3
P1
4
/D
4
P0
5
/A
21
P0
7
/A
23
V
SS
MD1
P2
1
/D
9
P2
2
/D
10
P2
3
/D
11
P2
4
/D
12
P2
5
/D
13
P2 6 /D 14
P2
7
/D
15
P3
0
/RDY
V
CC
X
OUT
X
IN
V
SS
MD0
RESET
V
CC
V
SS
AV
CC
AV SS
V
REF
P8
1
/RxD
1
P8
0
/TxD
1
1 3 2 4 6 5 7 9 8 10 12 11 13 15 14 16 18 17 19 21 20 22 24 23 25 27 26 28 30 29
80 78 79 77 75 76 74 72 73 71 69 70 68 66 67 65 63 64 62 60 61 59 57 58 56 54 55 53 51 52
P7
3
/AN
3
/AD
TRC
/INT
4
P6
4
/T
A4
OUT
/DMAA
CK
2
P6
2
/T
A3
OUT
/DMAA
CK
1
P6
3
/T
A3
IN
/DMAREQ
1
P6
1
/T
A1
IN
/DMAREQ
0
P5
7
/T
A2
IN
/R
TP1
3
P5
1
/T
A0
IN
/R
TP0
1
P5
6
/T
A2
OUT
/R
TP1
2
P5
0
/T
A0
OUT
/R
TP0
0
P5
5
/R
TP1
1
P5
4
/R
TP1
0
P5
3
/R
TP0
3
P5
2
/R
TP0
2
P6
0
/T
A1
OUT
/DMAA
CK
0
P9
6
/WRH/UCAS
P6
5
/T
A4
IN
/DMAREQ
2
P6
6
/DMAREQ
3
P7
2
/AN
2
/INT
3
P12
2
/INT
2
/TB2
IN NMI
BYTE
P12 1 /INT 1 /TB1 IN
P12
0
/INT
0
/TB0
IN
P7
1
/AN
1
P7
0
/AN
0
P8
2
/CTS
1
/CLK1
P9
5
/WRL/LCAS
P9
4
/CAS/W
P9
3
/CS
3
/RAS
3
P9
2
/CS
2
/RAS
2
P9
1
/CS
1
/RAS
1
P9
0
/CS
0
P4
4
/HLD
A
P4
3
/HOLD
P4
0
/ALE
P3
3
/BHW
P3
2
/BL
W
P3
1
/RD
P4
2
/TC
P4
1
/
φ
1
IC500 M37920FCCGP(MICOM)
NAME DESCRIPTION FUNCTION I/O
V
CC
,V
SS
Power source Vcc:applied 5V ± 0.5V Vss:applied0V I
MD1 Connect to Vss.
BYTE External data bus
width switch input
Memory extension mode or micro prosessor mode: Select which external data bus width 8bits
and 16bits. When 16 bits at low and 8bits at high.
I
AV
CC
,AV
SS
Analogue power
source
Power sourse for A-D converter. External connect AVcc to Vcc and AVss to Vss. I
V
REF
Voltage reference Voltage reference for A-D converter. I
P0 0
〜
P0 7 Input/output port
P0
Single chip mode:port P0 is in/output for 8 bits.
Memory extension or micro-processor mode:address(A16
〜 A23)output. When DRAM space
access:multiplex address(MA8 〜 MA11)output.
I/O
P1
0
〜 P1
7
Input/output port
P1
Single chip mode:same function of port P0.
Memory extension or micro-processor mode:in/output under data 8 bits (D0
〜 D7)
I/O
P2
0
〜 P2
7
Input/output port
P2
Single chip mode,memory extension ormicro prosessor mode(BYTE is high & use external data
bus width is 8 bits width):same function of port P0.
Memory extension or micro-processor mode(BYTE is low & use external data width is 16 bits
width):in/output high data 8 bits(A8
〜
D15).
I/O
P3 0 〜 P3 3 Input/output port
P3
I/O
P4 0 〜 P4 4 Input/output port
P4
I/O
P5
0
〜 P5
7
Input/output port
P5
Single chip mode:same fanction P0,timer A1,A2 in/output and real-time output.
I/O
P6 0 〜 P6 6 Input/output port
P6
Single chip mode:same fanction P0 and timer A1,A3,A4 in/output.
DMA requirement input and DMA answer signal. I/O
P7 0 〜 P7 3 Input/output port
P7
I/O
P8
0
〜 P8
6
Input/output port
P8
Single chip mode:same fanction P0 and UART
0
,UART
1
input.
I/O
P9
0
〜 P9
6
Input/output port
P9
I/O
P10
0
〜 P10
7
Input/output port
P10
Single chip mode:same fanction P0.
Memory extension or micro prosessor mode:address(A
0 〜
A
7
)output.
I/O
P11
0
〜 P11
7
Input/output port
P11
Single chip mode:same fanction P0.
Memory extension or micro prosessor mode:address(A
8 〜
A
15
)output and multiplex address
(MA
0 〜
MA
7
)output when DRAM space access.
I/O
P12
0
〜 P12
2
Input/output port
P12
Single chip mode:same fanction P0 and timer B
0
,B
1
,B
2
input.
I/O
NMI Non maskable
interrupt
Non maskable interrupt.
I
X
IN
Clock input
Clock oscillation circuit in/output. connect ceramic or crystal resonator between Xin and Xout.
Use external clock input connect Xin and Xout open.
I
X
OUT
Clock output O
I
Reset input Reset:low level applied. I
MD0 MD0 Prosessor mode switch. Connect to Vss when songle chip modeand memory extension mode. I
MD1
RESET
Single chip mode:same fanction of P0.
memory extension mode:P3
0
is in/output port andRDY outout at regster set.
Each P3
1
,P3
2
and P3
3
are RD,BLW and BHW output.
Single chip mode:same fanction of P0.
memory extension mode:P4
0 〜
P4
4
are in/output and ALE, φ
1
,TC,HOLD,HLDA in/output at
register set.
Micro prosessor made:P4
0
,P4
1
are output ofALE, φ
1
, and in/output at resister set.
P4
2
is in/output and TC output at resister set. P4
3
is HOLD output. P4
4
is HLDA output.
Single chip mode:same fanction and A-D converter input.
P7
2 ,P7 3 are INT 3 ,INT 4 input.
Single chip mode:same fanction P0,chip select CS
1 〜
CS
3
output and DRAM control signal
output.