Sanyo CE17LC4-C, Service Manual

Page: 17 / 32

-17-
N2SL
CPU PORT FUNCTIONS
(continued page 3 of 5)
L 1 GPIO6 General purpose I/O
L 2 VSS_IO31 Digital Ground Digital 3V3 ground used for I/Os
L 3 VDD_CORE11 Digital Supply Digital 1V8 supply used for core logic
L 4 PWM0 5 V TTL Pulse width modulated backlight brightness control
L 1 1 RSN7 LVDS
differential
driver LVDS Panel Bus PB for ODD / EVEN pixels
L 1 2 VSS_LVDS3 LVDS Ground LVDS supply ground
L 1 3 N/C N / A Not Connected
L 1 4 N/C N / A Not Connected
L 1 5 GND1 ground 1 for TV processor
L 1 6 VP3 3rd supply for TV processor (+5 V)
L 2 3 VP1 1st supply for TV processor (+5 V)
L 2 4 GND1 Ground 1 for TV processor
L 2 5 PH1LF Phase 1 filter
L 2 6 PH2LF Phase 2 filter
M1 VDD3V3_RGB2 Analog supply voltage (3.3 V)
M2 VSS_CORE11 Digital Ground Common digital core 1V8 ground
M3 VSS_CORE01 Digital Ground Common digital core 1V8 ground
M4 N/C N / A Not Connected
M11 RSP7 LVDS
differential
driver LVDS Panel Bus PB for ODD / EVEN pixels
M12 N/C N / A Not Connected
M13 N/C N / A Not Connected
M14 N/C N / A Not Connected
M15 VDDA1
Analog supply for TCG u-controller and digital supply for TV
processor (+3.3 V)
M16 VDDA1 Analog supply for TCG u-controller and digital supply for TV
processor (+3.3 V)
M23 GND1 Ground 1 for TV processor
M24 DECDIG Decoupling digital supply
M25 VGUARD/SWIO V-guard / I/O switch (e.g. 4mA current sinking capability for direct
drive of LEDs)
M26 XTALOUT Crystal oscillator output (TV processor)
N1 VDDA1V8_ADC_B Analog supply voltage for ADC (1.8 V)
N2 VSSA_ADC_B Analog supply ground for ADC
N3 IN_B Analog Blue colour input (scaler)
N4 VSSA_RGB2 Analog supply ground
N11 RSP5 LVDS
differential
driver LVDS Panel Bus PB for ODD / EVEN pixels
N12 RSN5
LVDS
differential
driver
LVDS Panel Bus PB for ODD / EVEN pixels
N13 RSN6 LVDS
differential
driver LVDS Panel Bus PB for ODD / EVEN pixels
N14 RSP6
LVDS
differential
driver
LVDS Panel Bus PB for ODD / EVEN pixels
N15 VREFAD_POS Positive reference voltage (+3.3 V)
N16 VREFAD_NEG Negative reference voltage (0 V)
N23 VREF_HPR Positive reference voltage SDAC (+3.3 V)
N24 VREF_POS_HPR Positive reference voltage SDAC (+3.3 V)
N25 VREF_HPR Negative reference voltage SDAC (0 V)
N26 XTALIN Crystal oscillator input (TV processor)
P1 VSSA_RGB1 Analog supply ground
P2 VDD3V3_RGB1 Analog supply voltage (+3.3 V)
P3 AVI_TEST
P4 REF_B Reference voltage Blue
P11 RSP4 LVDS
differential
driver LVDS Panel Bus PB for ODD / EVEN pixels
P12 RSN4 LVDS
differential
driver LVDS Panel Bus PB for ODD / EVEN pixels
P13 VDD_LVDS0 LVDS Supply LVDS supply voltage (3.3 Volt)
P14 VSS_LVDS0 LVDS Ground LVDS supply ground
P15 VREFAD Reference voltage for audio ADCs (3.3/2 V)
P16 GNDA ground
P23 VDDA3 Supply (+3.3 V)
P24 VREF_POS_LSL Positive reference voltage SDAC (+3.3 V)
P25 VREF_HPR Negative reference voltage SDAC (0 V)
P26 N/C N / A Not Connected
R1 VDDA1V8_ADC_G Analog supply voltage for ADC (+1.8 V)
R2 VSSA_ADC_G Analog supply ground for ADC
R3 IN_G Analog Green input (scaler)
R4 REF_G Reference voltage Green
R11 RSN3 LVDS
differential
driver LVDS Panel Bus PB for ODD / EVEN pixels
R12 RSP3 LVDS
differential
driver LVDS Panel Bus PB for ODD / EVEN pixels
R13 RSN2 LVDS
differential
driver LVDS Panel Bus PB for ODD / EVEN pixels
R14 RSP2 LVDS
differential
driver LVDS Panel Bus PB for ODD / EVEN pixels
R15 VDDA Analog supply for audio ADCs (+1.8 V)
R16 VDDA2 supply voltage for SDAC (+3.3 V)
R23 VSSC4 ground
R24 VDDC4 digital supply for SDACs (+1.8 V)
R25 N/C N / A Not Connected
R26 N/C N / A Not Connected
T 1 VDD3V3_IN Analog supply for analog input buffer (+3.3 V) (scaler)
T 2 VSSA_CLEAN Analog supply ground (clean)
T 3 RBIAS External bias resistor
T 4 SOGIN Green input for sync separation (scaler)
T 1 1 RSN0
LVDS
differential
driver
LVDS Panel Bus PB for ODD / EVEN pixels
ROW T
ROW L
ROW M
ROW N
ROW P
ROW R