9-2 DSP CORE
DONE
/PROGRAM
DSP_GPS_UARTTX
DSP_GPS_UARTRX
/RESET
DSP_CLKOUT
DSP_TIM1
DSP_TIM0
FPGA_CLK
CODEC_CLK
B_SYNCOUT
A_SYNCOUT
C12_288M
/SDCAS
/SDRAS//AOE
/SDWE//AWE
/CE0
/CE1
/CE2
/CE3
/BE0
/BE1
/BE2
/BE3
SDCKE
ECLKOUT1
ECLKOUT2
PL1_15
PL1_13
PL1_11
PL1_9
PL1_5
PL1_3
PL1_1
PL1_7
PL1_17
PL1_19
PL1_21
PL1_23
PL1_25
PL1_27
PL1_29
PL1_31
PL1_33
PL1_35
PL1_37
PL1_1
PL1_3
PL1_5
PL1_7
PL1_9
PL1_11
PL1_13
PL1_15
PL1_17
PL1_19
PL1_21
PL1_23
PL1_25
PL1_27
PL1_29
PL1_31
PL1_33
PL1_35
PL1_37
/INIT
A_DOUT
A_BCLK
A_DIN
A_SYNCIN
B_DOUT
B_DIN
B_BCLK
B_SYNCIN
1V8
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
GPIO0
GPIO1
GPIO2
GPIO4
GPIO7
XF
/INT0
/INT1
/INT2
/INT3
/NMI
/IACK
1V26
3V3
3V3
3V3
3V3
3V3
R200
1K
1V8
1V26
R5/A 33R
R5/D 33R
R5/C 33R
3V3
R5/B 33R
3V3
R37/B 33R
R38/A 33R
R39/A 33R
R40/A 33R
R139
3K3
R44/A 33R
R44/D 33R
R45/D 33R
R46/D 33R
R44/B 33R
R45/A 33R
R46/A 33R
R44/C 33R
R45/B 33R
R45/C 33R
R46/B 33R
R46/C 33R
R47
33R
R51
33R
C234
22p
C233
22p
R71/B 33R
R71/A 33R
C4
22p
R71/D 33R
R71/C 33R
R10/A
3K3
R10/B
3K3
R10/C
3K3
R10/D
3K3
IC4
MAX6700
1 IN1
2 VCC
3 IN3
4 IN4
5
GND
6
/RESET
C48
100n
R190
56K
R188
22K
R42
10K
3V3
R1
3K3
R2
3K3
R31
3K3
R28
3K3
X1
24.5760MHZ
IN
GND
OUT
VCC
IC14
TPS76601
2
PG
1
NC/FB
7
OUT
8
OUT
5 IN
6 IN
4 /EN
3
GND
1V26
3V3
R137
3K3
R138
2K2
C143
22u/6.3
PL1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
C232
22p
C67
100n
C63
100n
C64
100n
C62
100n
C65
100n
C66
100n
C61
100n
C60
100n
C59
100n
C58
100n
C57
100n
1V26
3V3
PL34
7×2_P6_0.1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
R197
12K
R198
12K
R199
15K
R187
1K
R189
0R
R4/C 33R
R8/A 33R
TP2
R32
3K3
R7
3K3
3V3
IC1
TMX320VC5502
C0//ARE/SADS/CDCAS/SRE/PGPIO20
C1//AOE//SOE//SDRAS/PGPIO21
C2//AWE//SWE//SDWE/PGPIO22
C10//BE2/PGPIO30
C11//BE3/PGPIO31
C12/SDCKE/PGPIO32
C13//SOE3/PGPIO33
C14//HOLD/PGPIO34
C15//HOLDA/PGPIO35
VSS
DVDD
CVDD
175 HD0/PGPI036
173 HD1/PGPI037
172 HD2/PGPI038
170 HD3/PGPI039
169 HD4/PGPI040
167 HD5/PGPI041
166 HD6/PGPI042
164 HD7/PGPI043
43 HC0//HAS/PGPI04443
42 HC1/HBIL/PGP104542
46 HCNTL0
45 HCNTL1
44 /HCS
48 HR//W
51 /HDS1
49 /HDS2
52 HRDY
59 /HINT
163 HPIENA
8 /INT0
10 /INT1
11 /INT2
13 /INT3
14 /NMI/WDTOUT
15 /IACK
162 /RESET
7 TIM0
6 TIM1
54 CLKOUT
63 X2/CLKIN
62 X1
60 PVDD
61 PSENSE
17 CLKR0
18 DR0
19 FSR0
20 CLKX0
22 DX0
23 FSX0
24 CLKR1
25 DR1
26 FSR1
27 DX1
28 CLKX1
30 FSX1
31 DR2
32 DX2
38 SP0/CLKX2/GPI03
37 SP1/CLKR2/TTX
35 SP2/FSX2/GPI05
34 SP3/FSR2/TRX
40 SCL
41 SDA
5 GPIO0/BOOTMODE0
4 GPIO1/BOOTMODE1
3 GPIO2/BOOTMODE2
2 GPIO4/BOOTMODE3
1 GPIO6//HPI16
176 GPIO7//MCBSP2MO
55 XF
154 EMU1
155 EMU0
156 TDO
158 TD1
159 /TRST
160 TCK
161 TMS
112
A2
111
A3
110
A4
108
A5
107
A6
106
A7
104
A8
103
A9
102
A10
101
A11
99
A12
98
A13
96
A14
95
A15
93
A16
92
A17
90
A18/PGPIO0
89
A19/PGPIO1
88
A20/PGPIO2
87
A21/PGPIO3
152
D0
151
D1
150
D2
149
D3
147
D4
146
D5
145
D6
143
D7
142
D8
140
D9
139
D10
138
D11
137
D12
136
D13
135
D14
134
D15
133
D16/PGPIO4
132
D17/PGPIO5
131
D18/PGPIO6
129
D19/PGPIO7
128
D20/PGPIO8
127
D21/PGPIO9
126
D22/PGPIO10
125
D23/PGPIO11
123
D24/PGPIO12
122
D25/PGPIO13
120
D26/PGPIO14
119
D27/PGPIO15
118
D28/PGPIO16
116
D29/PGPIO17
115
D30/PGPIO18
114
D31/PGPIO19
86
85
84
82
C3/ARDY/PGPIO23
81
C4//CE0/PGPIO24
79
C5//CE1/PGPIO25
78
C6//CE2/PGPIO26
72
C7//CE3/PGPIO27
71
C8//BE0/PGPIO28
70
C9//BE1/PGPIO29
69
68
67
66
58
57
74
ECLKIN
76
ECLKOUT1
75
ECLKOUT2
64
EMIFCLKS
3V3
1V8
R9/A
3K3
R9/B
3K3
R9/C
3K3
R9/D
3K3
R191
3K3
R41/A 33R
C44
100n
C73
10u/6.3
C71
10u/6.3
C72
10u/6.3
C43
10u/6.3
C45
100n
C49
100n
C50
100n
C51
100n
C52
100n
C53
100n
C54
100n
C55
100n
C76
10u/6.3
C75
10u/6.3
C56
10u/6.3
C74
10u/6.3
R37/A 33R
C3
22p
C2
22p
TP1
C141
10u/6.3
R206
33R
C46
100n
C69
100n
C68
100n
C70
100n
C1
100p
C47
100n
R195
110K
/INT0
/INT1
/INT2
/INT3
/NMI
/IACK
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D11
GPIO0
GPIO1
GPIO2
GPIO4
GPIO7
XF
Access to HOST port.
HPIENA has internal pull-down resistor
so it is default disabled.
Data connection
to codecB
BOOTMODE : External Memory Boot
CLKMODE : External Clock Selected
HPIMODE : HPI8 Selected
MCBSP2MODE : UART Enabled
20×2 0.1
40 pin IDC header
NF
NF
Data connection
to codecA
SPARE IO
CONNECTED TO
FPGA IO
A
A
B
B
C
C
D
D
1
1
2
2
3
3
4
4
Summary of Contents for SI-30
Page 1: ...SERVICE MANUAL MODEL SI 30 Universal Automatic Identification Systrm...
Page 12: ...Picture 3 Transponder Application screen Picture 4 Transponder FPGA upload screen...
Page 26: ...4 Equipment photos 4 1 MKD front 4 2 MKD internal A 106...
Page 27: ...4 3 MKD inside the back of the 4 4 MKD back of the...
Page 28: ...4 5 TRANSPONDER top 4 6 TRANSPONDER front...
Page 29: ...4 7 TRANSPONDER internal V 889 CPU...
Page 31: ......