Samsung SGH-X100, Service Manual, Page: 8 / 41

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SGH-X100 Circuit Description
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5) Memory
Signals in the OM6357 enable two memories. They use only one volt supply voltage, VDD3 in the PCF50601. This
system uses Samsung's memory, KBB06A300M-T402. It is consisted of 128M bits flash NOR memory and 128M bits
flash NAND memory and 32M bits UtRAM. It has 16 bit data line, HD[0~15] which is connected to OM6357. It has 23
it address lines, HA[1~23]. CS_NAND and NCSRAM signals is chip select. Wrting process, HWR_N is low and it
enables writing process to flash memory and SRAM. During reading process, HRD_N is low and it enables reading
process to flash memory and SRAM. Each chip select signals in the OM6357 select memory among 2 flash memory and
UtRAM. Reading or writing procedure is processed after HWR_N or HRD_N is enabled. Memories use reset, which is
VDD3 delay from PCF50601. HA[22] signal enables lower byte of SRAM and HA[22] signal enables higher byte of
SRAM.
6) OM6357
OM6357 is consisted of ARM core and DSP core. It has 8x1Kword on-chip program/data RAM, 55 Kwords on-chip
program ROM in the DSP. It has 4K*32bits ROM and 2K*32bits RAM in the ARM core. DSP is consisted of KBS,
JTAG, EMI and UART. ARM core is consisted of EMI, PIC(Programmable Interrupt Controller), reset/power/clock unit,
DMA controller, TIC(Test Interface Controller), eripheral bridge, PPI, SSI(Synchronous Serial Interface), ACC(Asynchronous
communications controllers), timer, ADC, RTC(Real-Time Clock) and keyboard interface.
KBIO(0:7), address lines of DSP core and HD[0~15]. HA[1~23], address lines of ARM core and HD[0~15], data lines of
ARM core are connected to memory, YMU759.
CS_NAND, NCSRAM, NCSFLASH in the ARM core are connected to each memory. HWR_N and HRD_N control the
process of memory. External IRQ(Interrupt ReQuest) signals from each units, such as, PMU need the compatible process.
KBIO[0~7] receive the status from key and RXD0/TXD for data link cable(DEBUG_DTR/RTS/TXD/RXD/CTS/DSR).
It has JTAG control pins(TDI/TDO/TCK) for ARM core and DSP core. It recieves 13MHz clock in CKI pin from
external TCXO. ADC(Analog to Digital Convertor) part receives the status of temperature, battery type and battery voltage.
7) TCO-9141G(26MHz)
This system uses the 26MHz TCXO, TCO-9141G, Toyocom. AFC control signal form OM6357 controls frequency from
13MHz x-tal. It generates the clock frequency. This clock is connected to UAA3536.