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2. SGH-N707 Circuit Description
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2-1
1. SGH-N707 RF Circuit Description
1) RX PART
1. FEM(U402(SWITCFILTER))
→
Switching Tx, Rx path for GSM850, and PCS1900 by logic controlling.
2. FEM Control Logic (U402)
→
Truth Table
VC1
VC2
DCS / PCS Tx Mode
L
H
GSM Tx Mode
H
L
GSM / PCS Rx Mode
L
L
3. FILTER
To convert Electromagnetic Field Wave to Acoustic Wave and then pass the specific frequency band.
- GSM FILTER (U402(SWITCFILTER))
→
For filtering the frequency band between 869 ~ 894 MHz
- PCS FILTER(U402(SWITCFILTER))
→
For filtering the frequency band 1930 and 1990 MHz.
4. VC-TCXO (OSC401)
To generate the 13MHz reference clock to drive the logic and RF.
After additional process, the reference clock applies to the U101 Rx IQ demodulator and Tx IQ modulator.
The oscillator for RX IQ demodulator and Tx modulator are controlled by serial data to select channel and use fast lock
mode for GPRS high class operation.
5. SI 4205 (U404)
This chip integrates two differential-input LNAs.
The GSM input supports the GSM850, PCS input supports the DCS1900. The LNA inputs are matched to the 200 ohm
differential output SAW filters through eternal LC matching network.
Image-reject mixer downconverts the RF signal to a 100 KHz intermediate frequency(IF) with the RFLO from frequency
synthesizer. The RFLO frequency is between 1737.8 ~ 1989.9 MHz.
The Mixer output is amplified with an analog programmable gain amplifier(PGA), which is controlled by AGAIN.
The quadrature IF signal is digitized with high resolution A/D converts (ADC).
Also, this chip down-converts the ADC output to baseband with a digital 100 KHz quadrature LO signal. Digital
decimation and IIR filters perform channel selection to remove blocking and reference interface signals.
After channel selection, the digital output is scaled with a digital PGA, which is controlled with the DGAIN. DACs drive
a differential analog signal onto the RXIP, RXIN, RXQP, RXQN pins to interface to standard analog-input baseband IC.
