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2. SGH-E700 Circuit Description
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1. SGH-
E700
RF Circuit Description
1) RX PART
1. ASM(F101)
→
Switching Tx, Rx path for GSM900, DCS1800 by logic controlling.
2. ASM Control Logic (U102, U103)
→
Truth Table
VC_1
VC_2
GSM Tx Mode
L
H
DCS Tx Mode
H
L
GSM Rx Mode
L
L
DCS Rx Mode
L
L
3. FILTER
To convert Electromagnetic Field Wave to Acoustic Wave and then pass the specific frequency band.
- GSM FILTER (C105,C107,L101)
→
For filtering the frequency band between 925 ~ 960 MHz
- DCS FILTER (C110,C113,L103)
→
For filtering the frequency band 1805 and 1880 MHz.
4. TC-VCXO (OSC100)
To generate the 13MHz reference clock to drive the logic and RF.
After additional process, the reference clock applies to the U101 Rx IQ demodulator and Tx IQ modulator.
The oscillator for RX IQ demodulator and Tx modulator are controlled by serial data to select channel and use fast lock
mode for GPRS high class operation.
5. OM5178 (U100)
This chip integrates two differential-input LNAs.
The GSM input supports the E-GSM, DCS input supports the DCS1800. The LNA inputs are matched to the 200 ohm
differential output SAW filters through eternal LC matching network.
Image-reject mixer downconverts the RF signal to a 100 KHz intermediate frequency(IF) with the RFLO from VOL1861
frequency synthesizer. The RFLO frequency is between 1801 ~ 1921 MHz.
The Mixer output is amplified with an analog programmable gain amplifier(PGA), which is controlled by AGAIN.
The quadrature IF signal is digitized with high resolution A/D converts (ADC).
2) TX PART
Baseband IQ signal fed into offset PLL, this function is included inside of U100 chip.
OM5178 chip generates modulator signal which power level is about 1.5dBm and fed into Power Amplifier(PAM100).
The PA output power and power ramping are well controlled by Auto Power Control circuit.
We use offset PLL below table.