Samsung S5PC110, Manual

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S5PC110_UM 7 SD/MMC CONTROLLER
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7.7.2 EXAMPLE OF ADMA PROGRAMMING
Figure 7-14 Example of ADMA Data Transfer
Figure 7-14
shows a typical ADMA descriptor program. The data area is sliced in various lengths and each slice is
placed somewhere in system memory. The Host Driver describes the Descriptor Table with set of address, length
and attributes. Each sliced data is transferred in turns as programmed in descriptor.
7.7.3 DATA ADDRESS AND DATA LENGTH REQUIREMENTS
There are 3 requirements to program descriptor. The minimum unit of address is 4byte.
The maximum data length of each descriptor line is less than 64KB.
Total Length = Length 1 + Length 2 + Length 3 + ... + Length n
= multiple of Block Size If total length of a descriptor were not multiple of block size, ADMA transfer might not be
terminated. In this case, the transfer should be aborted by data timeout. Block Count register is defined as 16-bit
register and it limits the maximum of 65535 blocks transfer. If ADMA operation is less than or equal 65535 blocks
transfer, Block Count register can be used. In this case, total length of Descriptor Table shall be equivalent to
multiply block size and block count. If ADMA operation is more than 65535 blocks transfer, Block Count register
shall be disabled by setting 0 to Block Count Enable in the Transfer Mode Register. In this case, length of data
transfer is not designated by block count but Descriptor Table. Therefore, the timing of detecting the last block on
SD bus may be different and it affects the control of Read Transfer Active, Write Transfer Active and DAT line
Active in the Present State register. In case of read operation, several blocks may be read more than required.
The Host Driver shall ignore out of range error if the read operation is for the last block of memory area.