Samsung S3FM02G User Manual Download Page 18 | Manualshive

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Samsung S3FM02G User Manual Download Page 18

S3FM02G_USER'S GUIDE_REV 1.00

2 EVB DESCRIPTION

2-8

2.2.5 USART Block (LIN / RS-485 Include)

2.2.5.1 Features



Programmable baud rate generator



Parity, framing and overrun error detection



Idle flag for J1587 protocol



Line break generation and detection



Automatic echo, local loopback and remote loopback channel modes



Multi-drop mode: address detection and generation



Interrupt generation



2 dedicated LDMA channels per USART



5 to 9-bit character length



Configurable start bit of data transmission



Support the LIN protocol: LIN1.2 or LIN2.0 configurable release



Smart

–Card protocol: error signaling and re-transmission



Asynchronous mode maximum baud rate: PCLK/16



Synchronous mode maximum baud rate when providing SCK clock: PCLK/2



Synchronous mode maximum baud rate when receiving SCK clock: PCLK/4

Table 2-2 USART Pin Description

Pin Name

Function

I/O Type

Active Level

Comments

USARTTXD [3:0]

USART Transmit Data Line

O

–

–

USARTRXD [3:0]

USART Reception Data Line

I

–

–

USARTCLK [3:0]

USART transmission clock

Bi-Direction

–

–

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17
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20
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Summary of Contents for S3FM02G

Page 1: ...S3FM02G Evaluation Board Revision 1 00 February 2011 U Us se er r s s G Gu ui id de e 2011 Samsung Electronics Co Ltd All rights reserved ...

Page 2: ... s technical experts Samsung products are not designed intended or authorized for use as components in systems intended for surgical implant into the body for other applications intended to support or sustain life or for any other application in which the failure of the Samsung product could create a situation where personal injury or death may occur Should the Buyer purchase or use a Samsung prod...

Page 3: ...Revision History Revision No Date Description Author s 1 00 Feb 08 2011 Initial draft Juil Kim ...

Page 4: ... 2 4 2 Block Description 2 7 2 2 5 USART Block LIN RS 485 Include 2 8 2 2 5 1 Features 2 8 2 2 5 2 Block Description 2 9 2 2 6 SSP Block 2 11 2 2 6 1 Features 2 11 2 2 6 2 Block Description 2 12 2 2 7 I2C Block 2 13 2 2 7 1 Features 2 13 2 2 7 2 Block Description 2 13 2 2 8 ADC Block 2 14 2 2 8 1 Features 2 14 2 2 8 2 Block Description 2 14 2 2 9 OP AMP Block 2 15 2 2 9 1 Features 2 15 2 2 9 2 Blo...

Page 5: ...tion 2 5 Figure 2 5 Encoder Block Description 2 7 Figure 2 6 USART Block Description 2 10 Figure 2 7 SSP Block Description 2 13 Figure 2 8 I2C Block Description 2 13 Figure 2 9 ADC Block Description 2 14 Figure 2 10 OP AMP Block Description 2 15 Figure 2 11 LCD Block Description 2 17 Figure 2 12 Buzzer Block Description 2 18 Figure 2 13 LED Block Description 2 18 Figure 2 14 Wake Up Block Descript...

Page 6: ...List of Tables Table Title Page Number Number Table 2 1 ENC Pin Description 2 6 Table 2 2 USART Pin Description 2 8 ...

Page 7: ...a Flash Internal up to 24 Kbytes SRAM for stack data memory or cod memory Operating temperature 40 to 85 C Operating voltage range 2 7 to 5 5V Interrupt controller Dynamically reconfigurable Nested Vectored Interrupt Controller NVIC Clock and Power Controller CM 10 ch DMA Controller DMAC Watch Dog Timer WDT 8 ch 16 bit Timer Counters TC 32 bit Free Running Timer FRT 8 ch 16 bit PWM 2 ch 16 bit Enc...

Page 8: ...ram Flash 384KB PF Controller Data Flash 16KB DF Controller SRAM 24KB SRAM Controller AHB2APB DMA Con CM IVC Controller PLLCLK 8 75MHz EMCLK 4 8MHz IMCLK 8 16 20MHz ESCLK 32 768KHz ISCLK 32 768KHz I O conf GPIO PLL IMOSC20 IMOSC16 ISOSC IVC WDT 12 BIT ADC0 12 BIT ADC0 10 BIT ADC0 5ch OP AMP ADC 0 1 Controller I O conf GPIO OP AMP Controller FRT 8 ch Timer Counter 8ch PWM 4ch USART 2ch SSP 2ch I2C ...

Page 9: ...r Windows NT Parallel Port 1 4 Board Components The board consists of 32 bit RISC ARM CortexTM M3 Core Micro controller S3FM02G o ETM function embedded with ARM CortexTM M3 o SWD Serial Wire Debug and JTAG Debugging Solution Memory o Serial EEPROM SSP8 8 Kbytes 8 bit SSP16 4 Kbytes 16 bit IIC 16 Kbytes 8 bit Serial communication lines o 2 CAN IOS 11898 9 pin D sub male o 1 ENC 15 pin D sub female ...

Page 10: ...to 12V Clocks o 4MHz or 8MHz External main clock o Load capacitor 15pF to 30pF recommend Default 22pF Debugging Method o A standard 20 pin JTAG interface connector o Cortex debug connector 5 2 1 27mm header male o Cortex debug ETM connector 10 2 1 27mm header male Display o Enable 4com 40seg LCD 22 2 2 54mm header male ...

Page 11: ...escription 2 1 Configuration JTAG CORTEX DEBUG CORTEX DEBUG ETM AS PRO S3FM02G POWER Supply MODE set Clock CAN Block Connector USART Block Connector ENC Block Connector LIN RS 485 Terminal LCD SSP Block I2C Block BUZZER ADC Block Figure 2 1 Board Configuration ...

Page 12: ...ge 3 J5 J6 J8 J9 Jumper Setting for S3FM02G Power Block J5 S3FM02Gs VDDCORE Voltage level selection 3 3V or 5V J5 S3FM02Gs VDDIO Voltage level selection 3 3V or 5V J5 S3FM02Gs AVDD0 Voltage level selection 3 3V or 5V J5 S3FM02Gs AVDD1 Voltage level selection 3 3V or 5V 4 D2 D3 Power Display LED D2 3 3V Display red color D3 5V Display green color 5 SW1 Power Input ON OFF toggle Switch J7 CN Share a...

Page 13: ...om Figure 2 3 Mode Set Block J11 J13 Jumper Setting J13 MODE1 J11 MODE0 Mode Description 0 low 0 low User Normal Debug 0 high 1 high User Flash Writing Tool 1 low 0 low User UART SPGM Tool R8 MODE 2 Connect GND R8 MODE2 J13 MODE1 J11 MODE0 Mode Description 1 high 0 low 1 high SCAN Mode Test ...

Page 14: ...its own identifier mask Programmable FIFO mode concatenation of Message Objects Maskable interrupt Disabled Automatic Retransmission mode for Time Triggered CAN applications Programmable loop back mode for self test operation Power management block and wake up mode allowing optimization of power consumption CAN_TX output pin configurable in open drain allowing connection without external transceiv...

Page 15: ...ting Transmitter 1 2 closed Connect TXD to P0 18 high speed CAN_TX CH0 3 4 closed Connect TXD to P1 7 high speed CAN_TX CH1 5 6 closed Connect TXD to P1 28 high speed CAN_TX CH0 5 J34 Jumper Setting Mode Control input Closed CAN Transceiver standard mode Default close 6 J35 Jumper Setting Battery voltage 1 2 Closed VDDIN 12V input 2 3 Closed CAN bus line input 7 J36 Low speed CAN mode select 2 54m...

Page 16: ...sition Counter PCR and Speed Counter SPCR Capture function support for slow rotating Phase a Capture PACDR and Phase B Capture PBCDR Filter in the PHASEZ and edge selector for PHASEZ Up to 2 channels Up Down counter Table 2 1 ENC Pin Description Pin Name Function I O Type Comments PHASEA 1 0 Phase A input I PHASEB 1 0 Phase B input I PHASEZ 1 0 Phase Z input I ...

Page 17: ...sed Connect Channel A to P2 23 CH0 2 3 closed Connect Channel A to P0 29 CH1 2 J38 Jumper Setting Channel B 1 2 closed Connect Channel B to P2 24 CH0 2 3 closed Connect Channel B to P0 30 CH1 3 J39 Jumper Setting Index Z 1 2 closed Connect Index Z to P2 25 CH0 2 3 closed Connect Index Z to P0 31 CH1 Figure 2 5 Encoder Block Description ...

Page 18: ...channels per USART 5 to 9 bit character length Configurable start bit of data transmission Support the LIN protocol LIN1 2 or LIN2 0 configurable release Smart Card protocol error signaling and re transmission Asynchronous mode maximum baud rate PCLK 16 Synchronous mode maximum baud rate when providing SCK clock PCLK 2 Synchronous mode maximum baud rate when receiving SCK clock PCLK 4 Table 2 2 US...

Page 19: ...t P0 1 USART_TXD0 to J58 2 4 closed Connect P0 22 USART_TXD1 to J58 J56 Jumper Setting RX LIN USART RS 485 Connect RXD0 or RXD1 to each block Depending on the J55 Setting 1 2 closed LIN RX line LIN driver 0 J59 terminal block 3 4 closed USART RX line Transceiver ch1 P4 D sub 5 6 closed RS 485 RX line J62 terminal block J56 Jumper Setting TX LIN USART RS 485 Connect TXD0 or TXD1 to each block Depen...

Page 20: ... sub 3 4 closed Connect P1 10 USART_TXD2 to LIN driver 1 J67 terminal block 5 6 closed Connect P0 28 USART_TXD3 to RS232 transceiver channel 0 P3 D sub 7 8 closed Connect P0 28 USART_TXD3 to LIN driver 1 J67 terminal block 5 J59 J62 J67 CCP3 5 3pin Terminal Block J59 LIN0 Interface J62 RS 485 Interface J67 LIN1 Interface 6 U59 U62 LIN ISO9141 Driver TLE7259 2GU 7 U59 U62 RS 485 Transceiver SN65HVD...

Page 21: ... DESCRIPTION 2 11 2 2 6 SSP Block 2 2 6 1 Features Up to 2 channels Programmable data frame from 4 to 16 bit Support Master and Slave Mode Programmable Clock Pre scale Separate 16 32 bit width Transmit Receive FIFO Dedicated DMA channel ...

Page 22: ... U7 EEPROM serial output pin 4 48 J49 J51 J52 Jumper Setting 2 U8 EEPROM SSP16 4Kbytes x 16 bit J48 U8 chip select pin 1 2 closed P1 7 SSPFSS 0 2 3 closed P1 3 SSPFSS 1 J49 U8 SSP clock pin 1 2 closed P1 6 SSPCLK 0 2 3 closed P1 2 SSPCLK 1 J51 U8 Serial data input pin 1 2 closed P1 4 SSPMOSI 0 2 3 closed P1 0 SSPMOSI 1 J52 U8 Serial data output pin 1 2 closed P1 5 SSPMISO 0 2 3 closed P1 1 SSPMISO...

Page 23: ...n Fast mode Dedicated DMA channel 2 2 7 2 Block Description 1 2 closed Connect P0 14 P0 CH0 IICSCL0 to U6 SCL 3 4 closed Connect P1 4 P1 CH1 IICSCL1 to U6 SCL 1 U6 EEPROM 16Kbytes x 8 bit 2 J44 Jumper Setting 5 6 closed Connect P1 26 P1 CH0 IICSCL0 to U6 SCL 7 8 closed Connect P0 15 P0 CH0 IICSDA0 to U6 SDA 9 10 closed Connect P1 5 P0 CH0 IICSDA0 to U6 SDA 11 12 closed Connect P1 25 P0 CH0 IICSDA0...

Page 24: ...hannels Dedicated DMA channel 2 2 8 2 Block Description 1 2 closed AVDD 0 1 J22 ADC power select 2 J23 Adjust the value of the Variable resistor control RV1 3 J24 Using the value of Thermistor resistor 2 3 closed AVDD 1 1 2 closed AIN01 2 3 closed AIN13 1 2 closed AIN02 2 3 closed AIN14 4 J25 Using the value of Voltage dinider 1 2 closed AIN03 2 3 closed AIN15 5 J26 ADC spare pin AIN01 AIN08 6 J28...

Page 25: ...nal Amplifier Negative input pin I 2 2 9 2 Block Description 1 2 closed OP0_N P1 24 1 J68 Jumper Setting Connected to RV2 3 J70 J71 J72 Spare ports 7 8 closed OP3_N P2 1 1 2 closed OP0_P P1 25 3 4 closed OP1_P P1 28 J71 OP0 4_O J72 OP0 4_P 3 4 closed OP1_N P1 27 5 6 closed OP2_N P1 30 9 10 closed OP4_N P2 14 R51 P2 11 AIN04 connected to RV2 2 J69 Jumper Setting Connected to RV3 5 6 closed OP2_P P1...

Page 26: ...eatures Four common output pins COM 3 0 Forty segment output pins SEG 39 0 LCD bias by internal or external resistor Supports bias and duty mode for each corresponding operation Programmable flame clock generator Display Memory Registers contain the data to be displayed on the LCD ...

Page 27: ...TION 2 17 2 2 10 2 Block Description 1 J45 LCD Voltage Driving 2 J46 22x2 2 54mm Header for Side Boards 3 BOO REE LCD Board 64mm x 50mm Side Board 4 SAMSUNG LCD Board 64mm x 32mm Side Board 5 3 Support for hole Figure 2 11 LCD Block Description ...

Page 28: ...N 2 18 2 2 11 Other Blocks 2 2 11 1 Buzzer 1 J27 Buzzer control P0 23 PWM0 Figure 2 12 Buzzer Block Description 2 2 11 2 LED Display 1 J29 Jumper Setting LED select P0 15 D5 LED P0 9 D6 LED P0 7 D7 LED P0 5 D8 LED Figure 2 13 LED Block Description ...

Page 29: ...IDE_REV 1 00 2 EVB DESCRIPTION 2 19 2 2 11 3 Wake Up 1 J29 Jumper Setting LED select 2 J29 Jumper Setting LED select 3 J29 Jumper Setting LED select 4 J29 Jumper Setting LED select Figure 2 14 Wake Up Block Description ...

Page 30: ...15pin D sub Female USART U12 RS 232 transceiver 2CH P3 9pin D sub Female CH0 P4 9pin D sub Female CH1 LIN U9 LIN transceiver U11 LIN transceiver J59 3pin 3 5mm terminal block J67 3pin 3 5mm terminal block RS485 U10 RS 485 transceiver J62 3pin 3 5mm terminal block SSP U7 EEPROM 8Kbytes 8 bit U8 EEPROM 4Kbytes 16 bit I2C U6 EEPROM 16Kbytes 8 bit ADC J23 AIN01 or AIN13 input J24 AIN02 or AIN14 input ...

Page 31: ...Parts No Purpose Function Summary SW1 Power Power ON OFF SW2 Reset Board reset S3FM02G reset low SW3 Wake up Wake up signal high level SW4 Wake up Wake up signal low level SW5 I2C I2C Loofback Test 3 3V input SW6 LIN LIN0 Wake up GND input SW7 LIN LIN1 Wake up GND input ...

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