Samsung S3F401F Hardware User Manual Download Page 7 | Manualshive

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Samsung S3F401F Hardware User Manual Download Page 7

EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00

5

2. CONFIGURATION

S3F401FX

JTAG

POWER BLOCK

Page 1-6

IMC1 HEADER CONNECTOR

Page 1-11

MODE SETTING BLOCK

Page 1-7

UART BLOCK

Page 1-8

IMC0 HEADER CONNECTOR

Page 1-11

Main OSC

7-SEGMENT

Page 1-10

Buzzer

12-bit ADC BLOCK

Page 1 -12

SSP BLOCK

Page 1-9

Figure 2. S3F401F Evaluation Board Top-view

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Summary of Contents for S3F401F

Page 1: ...Evaluation Board Manual S3F401F 16 32 BIT RISC MICROPROCESSOR Dec 2007 REV 1 00 ...

Page 2: ... 1 1 1 Features 3 1 2 System Requirements 3 1 3 Board Components 4 2 Configuration 5 2 1 Detailed Block Configurations 6 3 Total blocks Unit Jumper Summury 15 3 1 Function Blocks 15 3 2 Jumper Connection 16 3 3 Switches 18 4 S3F401F EVB REV 1 0 Board Schematics 19 ...

Page 3: ...s are from the followings A 16 32 bit RISC CPU Core ARM7TDMI S A built in 256Kbyte NOR Flash memory An internal 20KB SRAM for stack data or code An interrupt controller supporting vectored interrupt 6xch 16 bit timers with capture and PWM function 1xch 8 bit basic timer 3 bit watch dog timer Three programmable I O port groups 2xch Inverter motor controller 2xch 16 bit Encoder counter 15xch 12 bit ...

Page 4: ...MI S CORE SRAM 20KB FLASH ROM 256KB I O CONTROLLER APB 12 BIT ADC IMC0 1 CLOCK MONITOR INTERRUPT CONTROLLER ENC0 1 IMC0 1 BRIDGE TAP CONTROLLER For JTAG SSP0 1 SSP0 1 UART0 1 UART0 1 Timer0 1 2 3 4 5 Timer0 1 2 3 4 5 Timer0 1 2 3 4 5 Timer0 1 2 3 4 5 TIMER 0 1 2 3 4 5 PLL Figure 1 S3F401F Block Diagram ...

Page 5: ...l devices master or slave SSP serial EEPROM 8K 8bit X25650 Synchronous Serial Port SSP serial EEPROM 4K 16bit 64LC40S LED IO Port output control display JTAG Connection 20Way JTAG connector Multi ICE Interface Trace 32 etc 1 2 SYSTEM REQUIREMENTS This section describes the hardware and software system requirements ARM Compiler SW Software Requirements ARM Debugger SW S3F401F EVB Board Set Power Su...

Page 6: ...zzer 6 x Switches IRQ x 2 Power Reset 4 x LED Power x1 IO Port output x 3 A regulator to generate 3 3V 4MHz Crystal as a master system clock source Switches for ADC input capacitor selection 7 segment 4 digit display circuit A standard 20 pin JTAG interface connector Dual line header pins for a port level or signal 53 x Jumpers for function setting control 15 x TP Test Pole to check specific pins ...

Page 7: ...401FX JTAG POWER BLOCK Page 1 6 IMC1 HEADER CONNECTOR Page 1 11 MODE SETTING BLOCK Page 1 7 UART BLOCK Page 1 8 IMC0 HEADER CONNECTOR Page 1 11 Main OSC 7 SEGMENT Page 1 10 Buzzer 12 bit ADC BLOCK Page 1 12 SSP BLOCK Page 1 9 Figure 2 S3F401F Evaluation Board Top view ...

Page 8: ...1 CN2 J23 Power Supply Connector CN1 VIN CN2 GND J23 DC adapter connector U7 Adjustable Voltage Regulator 3 3V generator J VDD33 VDDCORE VDDIO SW6 Power Switch DS4 Power Display LED VDD33 Power on status display J22 Jumper Setting Selection VDDCORE VDDIO 1 2 connection The VDD of each block is connected to VDD33 ...

Page 9: ...NUAL S3F401F_BD_UM_REV1 00 7 2 1 2 Mode Setting Block J9 J10 J11 Jumper Setting J9 J10 J11 MD 2 0 2 3 Connection 2 3 Connection 2 3 Connection NORMAL 1 2 Connection 2 3 Connection 2 3 Connection SPGM Others Only TEST Mode ...

Page 10: ... 3 U10 U11 UART Driver IC P2 P3 UART Connector J25 Jumper Setting TXD0 UARTTXD0 is connected to T1IN of MAX3221 RXD0 UARTRXD0 is connected to R1OUT of MAX3221 J26 Jumper Setting TXD1 UARTTXD1 is connected to T1IN of MAX3221 RXD1 UARTRXD1 is connected to R1OUT of MAX3221 ...

Page 11: ...EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1 00 9 ...

Page 12: ... SW9 ON RXD0 is connected to P1 14 CLK0 is connected to P1 15 SW10 ON TXD0 is connected to P1 13 U8 SSP16 serial EEPROM 4K 16bit FSS1 is connected to P1 20 CLK1 is connected to P1 19 RXD1 is connected to P1 18 SW7 ON TXD1 is connected to P1 17 The RDY nBUSY pin is connected to P2 11 SW8 ON The RESET pin is connected to P2 10 ...

Page 13: ...EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1 00 11 ...

Page 14: ... 2 1 5 7 SEGMENT BLOCK 1 2 3 The assignment of 7 segment control pins on the S3F401F EVB is the same like this SW1 ON This Port P0 0 P0 7 is connected to each segment of 7 segment SW2 ON This Port P1 9 P1 12 is connected to latch U3 7 segment display ...

Page 15: ...VALUATION BOARD MANUAL S3F401F_BD_UM_REV1 00 13 2 1 6 IMC BLOCK 1 2 The assignment of IMC pins on the S3F401F EVB is the same like this J20 A header pin group for MOTOR1 J21 A header pin group for MOTOR2 ...

Page 16: ...e selected to sample test with AIN0 AIN1 and AIN2 RV1 Variable Resistor J24 ADC Power Source Close When connecting short AVDD is same to VDD33 Open AVDD is a second right pin of J24 So AVDD should be connected to another power J7 2 3 connection ADTRG signal is generated by SW4 SW11 SW12 Control cap for each ADC input port ...

Page 17: ...s Description 7 SEGMENT U3 4Digit Segment J20 MOTOR 1 IMC J21 MOTOR 2 U14 RS 232 transceiver UART P41 RS 232 connector U7 SPI8 interface EEPROM 8K 8bit U8 SPI16 interface EEPROM 4K 16bit SSP J28 SPI block pin assignment POWER U11 3 3V generator regulator DS1 Red LED DS2 Green LED LED DS3 Yellow LED BUZZER BZ1 Buzzer ...

Page 18: ...ut voltage connector Connect Short J3 AIN1 input voltage connector Connect Short J4 AIN2 input voltage connector Connect Short J5 SW3_INPUT VDDIO connects to INT7 Open J6 Buzzer connector T3PWM connects to Buzzer Connect Short J7 SW4_INPUT VDDIO connects to INT8 Connect ADTRG J8 LED signal connector Port 0 0 0 1 0 2 connect to DS1 DS2 DS3 Connect Short ...

Page 19: ...J13 Port assignment pin Port 1 Open J14 Port assignment pin Port 0 Open J15 nTRST The JTAG connects to nTRST Open J16 J17 J18 J19 Chip socket connection Chip socket board is connected with S3F401F EVB Use the chip socket board J20 MOTOR1 IMC0 and ENC0 signal connector J21 MOTOR2 IMC1 and ENC1 signal connector J22 Generated VDD33 voltage from U11_regulator 3 3V 3 3V connects to VDD33 Join 1 2 J23 D...

Page 20: ...cts to latch SW3 INT7 LOW signal is generated by SW3 SW4 INT8 HIGH signal is generated by SW4 SW5 RESET Reset signal is generated by SW6 SW6 Power_VIN Power on switch SW7 SSP16 Port connects to EEPROM SW8 SSP16 Port connects to EEPROM SW9 SSP8 Port connects to EEPROM SW10 SSP8 Port connects to EEPROM SW11 AIN Port connects to ADC SW12 AIN Port connects to ADC ...

Page 21: ...02 S3F401F Micro Controller REV 1 0 SCH 03 System Power Generation REV 1 0 SCH 04 Clock Mode REV 1 0 SCH 05 ADC Interrupt BUZZER REV 1 0 SCH 06 JTAG Connector REV 1 0 SCH 07 UART Communication REV 1 0 SCH 08 SSP Communication REV 1 0 SCH 09 IMC ENC Signal REV 1 0 SCH 10 7 Segment Display REV 1 0 SCH 11 Expansion Connector REV 1 0 ...

Page 22: ...EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1 00 20 SCH 01 ...

Page 23: ...EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1 00 21 SCH 02 ...

Page 24: ...EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1 00 22 SCH 03 ...

Page 25: ...EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1 00 23 SCH 04 ...

Page 26: ...EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1 00 24 SCH 05 ...

Page 27: ...EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1 00 25 SCH 06 ...

Page 28: ...EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1 00 26 SCH 07 ...

Page 29: ...EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1 00 27 SCH 08 ...

Page 30: ...EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1 00 28 SCH 09 ...

Page 31: ...EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1 00 29 SCH 10 ...

Page 32: ...EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1 00 30 SCH 11 ...

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