10-8
Samsung Electronics
Glossary
Memory margin
:
The disparity between the maximum sustained voltage for keeping discharge and the sustained voltage for
turning off the cells
Memory type PDP
:
Refer to AC Plasma Panel that has memory. PDP made up of cells that keep turned on or off until switch
occurs.
MgO layer
:
In bombardment of electrons and ions, MgO’s high electron release rate, like cathode application, makes it
easier to release electrons.
MgO protecting layer
(Refer MgO layer) :
MgO layer on fluorescent material has secondary benefit that prevents fluorescent degradation by ion bom-
bardment.
Minimum firing voltage
:
Minimum voltage that can turn on any cells.[symbol : V1]
Minimum sustain voltage
:
Minimum sustain voltage that keeps turned on cell on.[symbol : Vsm1]
Monochrome display Minimum sustain voltage
:
Display that only expresses a limited color such as white, green and amber.
Multi-color display
:
Display that can express multiple colors .if not all colors.
Non-discharge slit
:
(Refer to inter electrode gap)
Operating margin
:
AC PDP voltage range that keeps cells turned on or off. Generally, its value gets less than memory margin
because of additional factors such as temperature effect, gloss ionization effect and waveform change.
Operating window
:
Actual voltage range that keeps cells turned on or off in any drive levels and surrounding environment.
Operating window degradation
:
Gradual decline in operating window, according to operating time.
Opposed discharge
:
Traditional two-electrode plasma panel structure where discharge occurs between the two sustained elec-
trodes across from each other.
Opposed discharge PDP
:
(Refer to opposed discharge.)
Peak luminance
:
Maximum luminance generated in one pixel in panel.
Peak luminance enhancement
:
Circuit and drive technology that accommodates increasing peak luminance.
Summary of Contents for PS42P2SBX/XEC
Page 2: ...ELECTRONICS Samsung Electronics Co Ltd Nov 2002 Printed in Korea AA82 00157A...
Page 19: ...Circuit Operation Description Samsung Electronics 5 3 5 1 2 D PDP PS 42 BLOCK DIAGRAM...
Page 32: ...Circuit Operation Description 5 16 Samsung Electronics 5 2 3 D DRIVER CIRCUIT DIAGRAM...
Page 33: ...Circuit Operation Description Samsung Electronics 5 17 5 2 3 E DRIVER BOARD CONNECTOR LAYOUT...
Page 34: ...Circuit Operation Description 5 18 Samsung Electronics...
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Page 63: ...Circuit Operation Description Samsung Electronics 5 47 Figure 5 42 Single logic buffer...
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Page 72: ...5 56 Samsung Electronics MEMO...
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Page 148: ...10 14 Samsung Electronics MEMO...
Page 158: ...9 10 Samsung Electronics MEMO...
Page 164: ...3 2 Samsung Electronics MENO...
Page 170: ...Schematic Diagrams 12 4 Samsung Electronics 12 4 Y Pb Pr Buffer Switching...
Page 173: ...Samsung Electronics Schematic Diagrams 12 7 12 7 Analog to Digital Converter...
Page 174: ...Schematic Diagrams 12 8 Samsung Electronics 12 8 DVI Input Block...
Page 180: ...Schematic Diagrams 12 14 Samsung Electronics 12 15 Sound AMP Module...