Samsung PS-50Q7HD, Service Manual

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Circuit Description
Samsung Electronics 13-9
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About Logic Board
The Logic Board consists of a Logic Main board, which processes the video signal input through LVDS and creates the address
driver output and XY drive signals, and a Buffer board, which buffers the output signal and outputs the signal to the Address Driver
IC (TCP IC).
Logic Board Function Remark
Logic Main
- Video Signal Processing (W/L, error diffusion, APC, FCR)
Built-in LVDS Application and 1 ASIC Chip
- Outputs the Address Driver Control and Data Signals to the Buffer board
- Outputs the XY Drive Board Control Signal
- Major Drive Voltage Monitoring (MICOM Circuit Block)
: Detects abnormal voltage applications and protects drive circuits
- Temperature Induced Operating Mode
(Low Temperature/Room Temperature/High Temperature)
: Optimization of discharge by temperature
Buffer Board
E Buffer Board Outputs data and control signals to the bottom left TCP IC.
Single Scan
and RSDS
applied
F Buffer Board Outputs data and control signals to the center up TCP IC.
G Buffer Board Outputs data and control signals to the bottom right TCP IC.
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Normal Waveform
If the PDP set and the Logic Board are operating properly, the Operating LED of Figure 1 blinks normally (at a 0.5 second interval)
and the V-SYNC and data are properly output. If the screen is displayed abnormally, check if the Vref voltage supplied to the DDR
is 1.25V.
If the set is out of order, follow the troubleshooting procedures below.
1. Visual Inspection: Check if the Operating LED of the Logic Main blinks at a 0.5 second interval.
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The Operating LED blinks too fast or too slow when Micom is processing data abnormally. In this case, reload the data to the
Micom. To load the data, load the data using the GA-WRITER, connecting power to the module.
2. If no problem has been found by a visual inspection, check if the drive waveform and address data are normal using an
oscilloscope.
(Checkpoint : For drive waveform output, measure the power of the damping resistance.
For address data output, because the address output is RSDS data, measure the output using a Differential Prove
for a more accurate result.
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If the drive waveform or address output is not measured, check if the output of R2104, which is to the left of U2010, is 3.3V
using a multimeter. No output is measured when the program is corrupted. In this case, reload the program. If the output is
measured, check if the ASIC_nRESET TP output is 3.3V. If the set does not work or no picture is displayed when the output
is normal, load the program using the GA-WRITER or measure the output again using another oscillator as this happens
when the clock generator is out of order through an oscillator (X2000) short, or an error occurred during the program's initial
run.
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For an abnormally displayed screen, check the data output. If the data output is normal, the reason may be a hardware short
or a resistance crack. First check if there is short or crack on the Logic Board (Logic Main and Buffer) through a visual
inspection and measure the resistance of the resistor in the area in question. For address data, check if the U2003 regulator
output is 2.5V as an abnormal screen may be caused by an abnormal operation of the DDR memory through the wrong Vref
voltage. Then, measure the R2018 and R2020 resistors and check if the output voltage is 1.25V. If not, the reason may be
because BGA is open or short. In this case, since this defect is not repairable, replace the board, reload the latest program
and retest it.
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If the screen is displayed abnormally when the Vref voltage is normal, conduct a short test to find any abnormal points and
repair the points, if found. If the found short is internal, replace the board.
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The following waveform shows a waveform when the V-sinc and address data are output properly.