5. Special Circuit Descriptions
5-1 CD
5-1-1 RF Amp (KA9220) : WIC01
5-1-2 Focus Error Amp (KA9220) : WIC01
5-1-3 Focus Servo System (KA9220) : WIC01
74
Photo Detector
B
C
A
D
PD1
PD2
58K
RF I-V AMP(1)
58K
10K
R2
RF I-V AMP(2)
V2
R1
10K
RF SUMMING
V1 AMP
RFO
RF
66
67
R3
75
RF I-V Amp(I-1) and RF I-V Amp (I-2) are converted to voltage (via
internal resistance of 58k½) from the current of PD1 (A+C) and
PD2 (B+D):
These voltages are added by the RF summing amplifier.
The signal (A+B+C+D) is applied to RFO (No.2 terminal)
RF output voltage is calculated as follows :
FOCUS ERROR Amp AMPLIFIES the difference
between RF I-V Amp (1) output (A+C) and RF I-V Amp (2) output (B+D)
These two signals are supplied to (-) and (+) input terminals of the
FOCUS ERROR Amp. The FOCUS ERROR signal resulting from this
difference voltage is applied to FE (Terminal No. 57).
The FE output voltage of this low frequency component varies according
to {(A+C) - (B+D)}.
VFE is calculated as follows:
VFE=(R2/R1) X (V2-V1) = 5.4(V2-V1)
This FOCUS ERROR voltage is sent to FOCUS SERVO.
When FS3 is ON, high-frequency gain decreases (time constant is set by pin17, pin19, and capacitor connected to
internal resistance). The capacitor between pin18 and GND sets the time constant to pass low freqencies in PLAY
mode.
The maximum frequency of focus phase compensation is inversely proportional to the resistance connected to pin 7.
Focus search peak is about 1.1 Vp-p, and is inversely proportional to the resistance connected to pins 22,23
(if this resistance changes, the peak of track jump and sled kick change). The inversion input of FZC comparator is set
to 5.7% of the difference between Vcc and VC (pin69) {(5.7% x (Vcc-Vc)}.
Note : If the resistance connected to pin 7 changes, the phase compensation peak of focus,tracking,sled servos change.
At the same time, Ôop-ampÕ dynamic range and offset voltage also change.
V
RF
= -R3 x (iPD1 + iPD2)
= -R3 x (V
1
/R
1
+ V
2
/R
2
)
= -R3 x ( + )
= x (V
1
+ V
2
)
R3
10K
V1
10K
V2
10K
57
63
R2
174K
C1 25P
FE
FOCUS
ERROR
AMP
164K
FE Bias
GND
Vcc
20K
32K
C2 25P
-(A+C)
-(B+D)
R1
V1 32K
3.6K
20
21
47
48
60K
FZC
0.0022
20K
0.1UF
0.1UF
FDFCT
HFGD
EFR
FE2
470K
DFCT
FS4
20K
48K
58
60
62
46K
580K
FS3
FSW
470K
130K
0.1UF
27
40K
6
PFSET
FS2
PHASE
COMPENSATION
92K
40K
10K
3
4.7UF
FSCH
FS1
50K
5.5U 11U
VREG
180K
ISET
FCE
120K
FOCUS
COIL
FSEO
FE1
61
Samsung Electronics
5-1
Summary of Contents for MAX-632P
Page 2: ...ELECTRONICS Samsung Electronics Co Ltd Jan 1997 Printed in Korea Code no AH68 20140A ...
Page 55: ...10 PCB Diagrams 10 1 Main Samsung Electronics 10 1 ...
Page 56: ...10 2 Samsung Electronics PCB Diagrams ...
Page 57: ...10 2 Front PCB Diagrams Samsung Electronics 10 3 ...
Page 58: ...10 3 Pro Logic Power PCB Diagrams 10 4 Samsung Electronics ...
Page 59: ...10 4 CD PCB Diagrams 10 4 1 Top View 10 4 2 Bottom View Samsung Electronics 10 5 ...
Page 60: ...PCB Diagrams 10 4 3 SUB 10 6 Samsung Electronics ...
Page 63: ...12 2 Front Schematic Diagrams 12 2 Samsung Elctronics UIC2 UIC3 ...
Page 64: ...12 3 Pro Logic Schematic Diagrams Samsung Electronics 12 3 DPIC7 DPIC4 DPIC5 DPIC3 ...