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Doc.No.
Rev.No
Page
/ 30
LTN133AT08-101
19
04-A00-G-080929
Approval
6.3 Power ON/OFF Sequence
: To prevent a latch-up or DC operation of the LCD module, the power on/off sequence
should be as the diagram below.
NOTE.
(1) The supply voltage of the external system for the module input should be the same
as the definition of V
DD
.
(2) Apply the lamp voltage within the LCD operation range. When the back-light turns on
before the LCD operation or the LCD turns off before the back-light turns off, the
display may momentarily become white.
(3) In case of V
DD
= off level, please keep the level of input signals on the low or keep
a high impedance.
(4) T4 should be measured after the module has been fully discharged between power
off and on period.
(5) Interface signal shall not be kept at high impedance when the power is on.
Power Supply
V
DD
0.9 V
DD
0.9 V
DD
0V
0 V
VALID
Signals
T
3
0.5
<<<<
T
1
≤≤≤≤
10 msec
0
<<<<
T
2
≤≤≤≤
50 msec
0
<<<<
T
3
≤≤≤≤
50 msec
500 msec
≤≤≤≤
T
4
T
1
T
2
T
4
0.1 V
DD
0.1 V
DD
Power ON/OFF Sequence
Back-light
200 msec
≤≤≤≤
T
5
200 msec
≤≤≤≤
T
6
Power On
Power Off
T
5
T
6
50%
50%
T1 : Vdd rising time from 10% to 90%
T2 : The time from Vdd to valid data at power ON.
T3 : The time from valid data off to Vdd off at power Off.
T4 : Vdd off time for Windows restart
T5 : The time from valid data to B/L enable at power ON.
T6 : The time from valid data off to B/L disable at power Off.