Samsung HT-DL100, Service Manual

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8-2 Samsung Electronics
2. 74VHC244
74VHC244
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The VHC244 is an advanced high speed CMOS octal bus
buffer fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power dissi-
pation. The VHC244 is a non-inverting 3-STATE buffer hav-
ing two active-LOW output enables. These devices are
designed to be used as 3-STATE memory address drivers,
clock drivers, and bus oriented transmitter/receivers.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and two supply systems such as battery back up. This cir-
cuit prevents device destruction due to mismatched supply
and input voltages.
Features
■
High Speed: t
PD
=
3.9ns (typ) at V
CC
=
5V
■
High noise immunity: V
NIH
=
V
NIL
=
28% V
CC
(min)
■
Power down protection is provided on all inputs
■
Low noise: V
OLP
=
0.6V (typ)
■
Low power dissipation: I
CC
=
4
m
A (max) @ T
A
=
25
°
C
■
Pin and function compatible with 74HC244
Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter ìXî to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Order Number Package Number Package Description
74VHC244M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300î Wide
74VHC244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC244N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300î Wide
Pin Names Description
OE
1
, OE
2
3-STATE Output Enable Inputs
I
0
ñI
7
Inputs
O
0
ñO
7
3-STATE Outputs