Samsung DVD-808K, Service Manual, Page: 80 / 165

Circuit Descriptions
Samsung Electronics 7-15
CH1 is RF signal waveform at refresh the error area of disc. It shows RF waveform swing lower than slice level.
At the end, this part is displayed as error which is recovered to the original data by error correction signal of
DIC1.
• CH1 : RFIN(at refreshing small error area of disc)
• CH2 : SLCO (Slice level)
• CH3 : ED7 (Sliced and outputted data of RF signal)
Fig. 7-22
It shows error signal output, comparing PLL clock and phase difference in DIC1 when RF signal is inputted.
The phase difference signals is inputted into VCO after summing in external PLL circuit of DIC1. VCO changes
PLL clock frequency according to input voltage.
The middle frequency of external PLL circuit is approx. 27MHz and a clock(DIC1-26) locked by PLL on the basis of
27MHz may be shown at DVD playback.
• CH1 : RFIN(DIC1-50, RF Input signal)
• CH2 : SLCO (DIC1-34, Sliced data)
• CH3 : PDON (DIC1-36, Phase difference signal)
• CH4 : PDOP (DIC1-37, Phase difference signal)
Fig.7-23
PLL lock at DVD playback
• CH1 : RFIN(DIC1-50, RF Input signal)
• CH2 : SLCO (DIC1-34, Sliced data)
• CH3 : PDON (DIC1-36, Phase difference signal)
• CH4 : PLCK (DIC1-26, PLL clock)
Fig. 7-24
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