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SEC ASIC

BL8531H_ADC

12BIT 10MSPS ADC

MIXED

HISTORY

CARD

11 / 11

Version

Date

Modified Items

Comments

ver 1.0

99.12

Original version published (preliminary)

ver 1.1

02.4.17

Phantom information added and the format changed

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Summary of Contents for BL8531H

Page 1: ...ty Error 0 7 LSB Integral Linearity Error 1 0 LSB Signal to Noise Distortion Ratio 65dB Total Harmonic Distortion 74dB 3 Channel Inputs Digital Output CMOS Level Operating Temperature Range 0ºC 70ºC GENERAL DESCRIPTION FEATURES FUNCTIONAL BLOCK DIAGRAM CCD Imaging Copiers Scanners Cameras Medical Instruments Digital Communication Systems TYPICAL APPLICATIONS 12BIT 10MSPS ADC BL8531H_ADC SAMSUNG EL...

Page 2: ... piar10_bb Analog Input BLUE Input Range 1 5V 3 5V B_INN AI piar10_bb Analog Input BLUE Input Range 1 5V 3 5V REDB DI picc_bb RED Channel Select 0 select GREENB DI picc_bb GREEN Channel Select 0 select BLUEB DI picc_bb BLUE Channel Select 0 select STBY DI picc_bb VDD power saving standby GND normal CKIN DI picc_bb Sampling Clock Input D 11 0 DO pot4_bb Digital Output VSSD DG vssd Digital GND VDDD ...

Page 3: ...may affect reliability Each condition value is applied with the other values kept within the following operating conditions and function operation under any of these conditions is not implied 2 All voltages are measured with respect to VSS unless otherwise specified 3 100pF capacitor is discharged through a 1 5kΩ resistor Human body model RECOMMENDED OPERATING CONDITIONS Characteristics Symbol Min...

Page 4: ... REFBOT 1 5V unless otherwise specified AC ELECTRICAL CHARACTERISTICS Characteristics Symbol Min Typ Max Unit Test Condition Maximum Conversion Rate fc 10 MHz AINR R_INP R_INN AING G_INP G_INN AING B_INP B_INN Dynamic Supply Current IVDD 20 mA fc 10MHz without system load Signal to Noise Distortion Ratio SNDR 65 dB AIN 1MHz Differential Input Total Harmonic Distortion THD 74 dB AIN 1MHz Differenti...

Page 5: ... REFBOT 1 5V 1 0 501 1 502 2 5 0000 0000 0001 2 0 502 1 503 2 5 0000 0000 0010 8197 2 499 2 5000 2 5 0111 1111 1111 8192 2 500 2 501 2 5 1000 0000 0000 8193 2 501 2 502 2 5 1000 0000 0001 16381 4 497 4 498 2 5 1111 1111 1101 16382 4 498 4 499 2 5 1111 1111 1110 16383 4 499 4 500 2 5 1111 1111 1111 TIMING DIAGRAM A1 A2 D1 D2 D3 D4 D5 A5 R_INP G_INP B_INP CKIN D 11 0 Input Sampling Period 5 11 ...

Page 6: ... error voltage at 12bit resolution This SHA is consist of fully differential op amp switching tr and sampling capacitor The sampling clock is non overlapping clock Q1 Q2 and sampling capacitor value is about 4pF SHA uses independent bias to protect interruption of any other circuit SHA amp is designed that open loop dc gain is higher than 70dB phase margin is higher than 60 degrees Its input block...

Page 7: ...nput nodes of HOST DSP back end circuit 2 If User want the specific analog input range the reference voltages may be forced D 110 Digital Mux Bidirectional PAD HOST DSP CORE D 11 0 D 110 ADC Function Test externally forced Digital Input bl8531h_adc R_INN R_INP REFTOP vdda vssa vbb vddd vssd D 11 0 MSB LSB B_INN B_INP G_INN G_INP REDB GREENB BLUEB 7 11 ...

Page 8: ...xample RED channel If you want to using the single ended input and RED channel is selected you should use he input range as below R_INP 0 5V 4 5V R_INN 2 5V If you want to using the differential input you should use the input range as below R_INP 1 5V 3 5V R_INN 1 5V 3 5V AINR R_INP R_INN If you want to changing input range AINR span you can force reference voltages AIN span REF REF REF REFTOP REF...

Page 9: ...nal Internal G_INP External Internal G_INN External Internal B_INP External Internal B_INN External Internal CKIN External Internal Separate from all other analog signals REFTOP External Internal Maintain the larger width and the shorter length as far as the pads Separate from all other digital lines REFBOT External Internal STBY External Internal REDB External Internal GREENB External Internal BL...

Page 10: ...ing Temperature ºC Integral Non linearity Error LSB Differential Non linearity Error LSB Bottom Offset Voltage Error mV Top Offset Voltage Error mV Maximum Conversion Rate MSPS Dynamic Supply Current mA Power Dissipation mW Signal to noise Ratio dB Pipeline Delay CLK Digital Output Format Provide detailed description timing diagram 1 Between single input output and differential input output config...

Page 11: ... BL8531H_ADC 12BIT 10MSPS ADC MIXED HISTORY CARD 11 11 Version Date Modified Items Comments ver 1 0 99 12 Original version published preliminary ver 1 1 02 4 17 Phantom information added and the format changed ...

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