RTD Embedded Technologies, Inc.
|
www.rtd.com
30
FPGA35S6046/FPGA35S6101 User’s Manual
6.2.17
R_DDR_STATUS
(R
EAD
)
This is a status register for the DDR2 memory interface.
B0: Read error
B1: Read overflow
B2: Read empty
B3: Read full
B4: Write error
B5: Write underrun
B6: Write empty
B7: Write full
B[14:8]: Read count
B[22:16]: Write count
B[24]: Command full
B[25]: Command empty
B[31]: Calibration done
6.2.18
R_COM1_OUT
(R
EAD
/W
RITE
)
This register sets the configuration and outputs of CN10 RS-232/422/485 transceivers.
B0: com1_txd
B1: com1_rts
B2: com1_dtr
B8: com1_enable
B9: com1_mode0
B10: com1_mode1
B11: com1_mode2
B12: com1_dir1
B13: com1_dir2
B14: com1_slew
B15: com1_term