
Common Instrument Functions
R&S
®
FPL1000
190
User Manual 1178.3370.02 ─ 03
Bit No.
Meaning
5
"FREQuency"
This bit is set if there is anything wrong with the frequency of the local oscillator or the reference
frequency in any of the active channels.
STATus:QUEStionable:FREQuency Register
provides more information on the error type.
6 - 7
Unused
8
"CALibration"
This bit is set if the R&S
FPL1000 is unaligned ("UNCAL" display)
9
"LIMit" (device-specific)
This bit is set if a limit value is violated in any of the active channels in any window.
STATus:QUEStionable:LIMit Register
provides more information on the error type.
10
"LMARgin" (device-specific)
This bit is set if a margin is violated in any of the active channels in any window.
STATus:QUEStionable:LMARgin Register
provides more information on the error type.
11
"SYNC" (device-specific)
This bit is set if the R&S
FPL1000 is not synchronized to the signal that is applied.
The R&S
FPL1000 is not synchronized if:
●
it cannot synchronize to midamble during a measurement or premeasurement
●
it cannot find a burst during a measurement or premeasurement
●
the results deviate too much from the expected value during premeasurements
12
"ACPLimit" (device-specific)
This bit is set if a limit during ACLR measurements is violated in any of the active channels.
STATus:QUEStionable:ACPLimit Register
provides more information on the error type.
13-14
Unused
15
This bit is always 0.
STATus:QUEStionable:ACPLimit Register
Available for the Spectrum application.
The STATus:QUEStionable:ACPLimit register contains information about the results of
a limit check during ACLR measurements. A separate ACPLimit register exists for
each active channel.
You can read out the register with
STATus:QUEStionable:ACPLimit:CONDition?
or
STATus:QUEStionable:ACPLimit[:EVENt]?
Table 6-12: Meaning of the bits used in the STATus:QUEStionable:ACPLimit register
Bit No.
Meaning
0
ADJ UPPer FAIL
This bit is set if the limit is exceeded in the
upper adjacent
channel
1
ADJ LOWer FAIL
This bit is set if the limit is exceeded in the
lower adjacent
channel.
2
ALT1 UPPer FAIL
This bit is set if the limit is exceeded in the
upper 1st alternate
channel.
Network and Remote Operation