RIGOL
DP1308A Performance Verification Manual
1
Appendix
Appendix A: Test Result Record Form
Performance Verification Test Record Form for
RIGOL
DP1308A
Tested by:
Date:
+6V/5A
Channel
+25V/1A
Channel
-25V/1A
Channel
CV Load Adjustment Rate
Specification
<0.01%+2mV
Output Voltage
(No Load) U
0
Output Voltage
(Full Load) U
1
Calculation Result
CV Linear Adjustment Rate
Specification
<0.01%+2mV
Output Voltage
(Undervoltage) U
0
Output Voltage
(Overvoltage) U
1
Calculation Result
CV Ripple and Noise
Specification
<350uVrms/2mVpp
Peak-to-Peak Vpp
RMS Vrms
Transient Response Time
Specification
The time for the output voltage to recover to within 15mV following the
current change from full load to half load or from half load to full load
