Renesas SuperH HS7630KCI01H User Manual Download Page 3

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SuperH™ Family

E10A Emulator

Additional Document for User’s Manual

r’s

Rev.1.0 2003.07

SH7630 E10A HS7630KCM02HE

Renesas Microcomputer Development

Environment System

SuperH™ Family / SH7600 Series

Specific Guide for the SH7630 E10A

Emulator

Summary of Contents for SuperH HS7630KCI01H

Page 1: ...ook over all the business of both companies Therefore although the old company name remains in this document it is a valid Renesas Electronics document We appreciate your understanding Renesas Electronics website http www renesas com April 1st 2010 Renesas Electronics Corporation Issued by Renesas Electronics Corporation http www renesas com Send any inquiries to http www renesas com inquiry ...

Page 2: ...ct for an application categorized as Specific or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics The quality grade of each Renesas Electronics product is Standard unless otherwise expressly specified in a Renesas Electronics data sheets or data books etc Standard Computers office equipment communications equipment test and meas...

Page 3: ...lator Additional Document for User s Manual User s Manual Rev 1 0 2003 07 SH7630 E10A HS7630KCM02HE Renesas Microcomputer Development Environment System SuperH Family SH7600 Series Specific Guide for the SH7630 E10A Emulator ...

Page 4: ...bed here may contain technical inaccuracies or typographical errors Renesas Technology Corporation assumes no responsibility for any damage liability or other loss rising from these inaccuracies or errors Please also pay attention to information published by Renesas Technology Corporation by various means including the Renesas Technology Corporation Semiconductor home page http www renesas com 4 W...

Page 5: ...ended Circuit 14 Pin Type 10 Section 2 Specifications of the SH7630 E10A Emulator s Software 13 2 1 Differences between the SH7630 and the Emulator 13 2 2 Specific Functions for the SH7630 E10A Emulator 16 2 2 1 Emulator Driver Selection 16 2 2 2 Break Condition Functions 16 2 2 3 Trace Functions 18 2 2 4 Notes on Using the JTAG Clock TCK and AUD Clock AUDCK 24 2 2 5 Notes on Setting the Breakpoin...

Page 6: ...ii ...

Page 7: ...1 Section 1 Connecting the Emulator with the User System 1 1 Components of the Emulator The SH7630 E10A emulator supports the SH7630 Table 1 1 lists the components of the emulator ...

Page 8: ...dth 96 0 mm Mass 90 0 g User system interface cable 1 HS7630KCM01H PCMCIA 14 pin type Length 80 cm Mass 45 0 g HS7630KCM02H PCMCIA 36 pin type Length 30 cm Mass 55 0 g HS7630KCI01H PCI 14 pin type Length 150 cm Mass 86 0 g HS7630KCI02H PCI 36 pin type Length 80 cm Mass 69 0 g Ferrite core connected with the user interface cable 1 Countermeasure for EMI only for HS7630KCM02H and HS7630KCI02H Soft w...

Page 9: ...terface cable is connected with the emulator or user system connect the ferrite core in the user system as shown in figure 1 1 User interface cable Host computer PC with PC card slot E10A emulator PC card slot PC PC Card User system User system connector Ferrite core Figure 1 1 Connecting Ferrite Core ...

Page 10: ...M02H HS7630KCI02H 36 pin connector Available HS7630KCM01H HS7630KCI01H 14 pin connector Not available The H UDI port connector has the 36 pin and 14 pin types as described below Use them according to the purpose of the usage 1 36 pin type with AUD function The AUD trace function is supported A large amount of trace information can be acquired in realtime The E10A emulator supports the window trace...

Page 11: ...514 6002 Minnesota Mining Manufacturing Ltd 14 pin straight type Note When the 36 pin connector is used do not connect any components under the H UDI connector When the 14 pin connector is used do not install any components within 3 mm of the H UDI port connector 1 4 Pin Arrangement of the H UDI Port Connector Figures 1 2 and 1 3 show the pin arrangement of the 36 pin and 14 pin H UDI port connect...

Page 12: ... TMS RESETP GND NC GND TRST GND TDI GND GND GND GND GND GND GND TDO ASEBRKAK User reset Output Output Input Input Input Input Output Output Output Output Output Output Output Output 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Pin No Signal Input Output Note 1 1 2 2 2 3 SH7630 Pin No 86 85 87 90 91 92 27 28 24 26 25 7 141 Pattern inhibited area...

Page 13: ...3 0 6 x 2 54 15 24 2 54 0 45 Pin 1 Pin 8 Pin 7 Pin 14 Pin 1 mark H UDI port connector top view H UDI port connector top view Pin No Signal SH7630 Pin No Note 1 2 3 4 5 6 7 11 8 to 10 12 to 13 14 TCK TRST TDO ASEBRKAK TMS TDI RESETP Not connected GND Input Output 27 24 25 7 28 26 141 1 2 2 2 GND 3 Output Input Input Output Output Input Input Output Pulled up Unit mm Figure 1 3 Pin Arrangement of th...

Page 14: ...d ASEMD0 high normal mode 3 The reset signal in the user system is input to the RESETP pin of the MPU Connect this signal to the H UDI port connector as the output from the user system 4 When a joined resistance is used for pull up it may be affected by a noise Separate TCK from other resistances 5 When the emulator is in use pin 29 of the H UDI connector must be pulled up by a resistance of sever...

Page 15: ... 13 15 17 19 21 23 25 27 29 31 33 35 2 4 6 8 12 10 14 16 18 20 22 24 26 28 30 32 34 36 AUDATA0 AUDATA2 AUDATA1 AUDATA3 TCK RESETP TMS TDO TDI TRST ASEBRKAK AUDCK AUDSYNC AUDCK N C ASEMD0 SH7630 VccQ 3 3 V VccQ 3 3 V H UDI port connector 36 pin type Reset signal 4 7 kΩ 4 7 kΩ 1 kΩ Figure 1 4 Recommended Circuit for Connection between the H UDI Port Connector and MPU 36 Pin Type ...

Page 16: ...signal in the user system is input to the RESETP pin of the MPU Connect this signal to the H UDI port connector as the output from the user system 4 When a joined resistance is used for pull up it may be affected by a noise Separate TCK from other resistances 5 When the emulator is in use pin 11 of the H UDI connector must be pulled up by a resistance of several kilo ohms 6 The pattern between the...

Page 17: ...3 4 5 6 7 ASEMD0 8 9 11 10 12 13 14 TCK RESETP TMS TDO TDI TRST ASEBRKAK NC SH7630 VccQ 3 3 V VccQ 3 3 V H UDI port connector 14 pin type Reset signal 4 7 kΩ 4 7 kΩ 1 kΩ Figure 1 5 Recommended Circuit for Connection between the H UDI Port Connector and MPU 14 Pin Type ...

Page 18: ...12 ...

Page 19: ...NK H 00000000 PC H A0000000 SR H 700000F0 GBR H 00000000 VBR H 00000000 MACH H 00000000 MACL H 00000000 PR H 00000000 SPC H 00000000 SSR H 000000F0 The emulator uses the H UDI do not access the H UDI Low Power States Sleep Software Standby and Module Standby For low power consumption the SH7630 has sleep software standby and module standby states The sleep software standby and module standby state...

Page 20: ... has stopped in the E10A emulator to access the memory Therefore realtime emulation cannot be performed The stopping time of the user program is as follows Environment Host computer 650 MHz Pentium III SH7630 60 MHz JTAG clock 3 75 MHz When a one byte memory is read from the command line window the stopping time will be about 20 ms Memory Access during User Program Break The emulator can download ...

Page 21: ...atchdog Timer Register Register Name Usage Register WTCSR W Write Watchdog timer control status register WTCNT W Write Watchdog timer counter WTCSR R Read Watchdog timer control status register WTCNT R Read Watchdog timer counter The watchdog timer operates only when the user program is executed Do not change the value of the frequency change register in the IO window or Memory window The internal...

Page 22: ...irtual and Physical specification in the Breakpoint window LDTLB instruction execution break function MEMORYAREA_SET command 2 2 1 Emulator Driver Selection Table 2 3 shows drivers which are selected in the E10A Driver Details dialog box Table 2 3 Type Number and Driver Type Number Driver HS7630KCM01H E10A PC Card Driver 7 HS7630KCM02H E10A PC Card Driver 8 HS7630KCI01H E10A PCI Card Driver 7 HS76...

Page 23: ... operating state in an SH7630 bus cycle matches the specified condition Types of buses that can be specified are listed below L bus CPU ALL Indicates an instruction fetch and data access including a hit to the cache memory L bus CPU Data Indicates a data access by the CPU including a hit to the cache memory I bus CPU DMA Indicates a CPU cycle when the cache memory is not hit and a data access by t...

Page 24: ...alog box X X X X O Note O Can be set in the dialog box X Cannot be set in the dialog box 2 2 3 Trace Functions The SH7630 E10A emulator supports the trace functions listed in table 2 6 Table 2 6 Trace Functions Function Internal Trace AUD Trace Branch trace Supported eight branches Supported Range memory access trace Not supported Supported Software trace Not supported Supported Table 2 7 shows th...

Page 25: ... output is output but the next trace information is not output The user program can be executed in realtime but some trace information may be lost Non realtime trace When the next branch occurs while the trace information is being output the CPU stops operations until the information is output The user program is not executed in realtime Trace buffer full Trace continue This function overwrites th...

Page 26: ...menu to display the Acquisition dialog box The AUD trace acquisition mode can be set in the AUD mode1 or AUD mode2 group box in the Trace mode page of the Acquisition dialog box Figure 2 1 Trace mode Page When the AUD trace function is used select the AUD function radio button in the Trace type group box of the Trace mode page ...

Page 27: ... Branch trace Page b Window Trace Function Memory access in the specified range can be acquired by trace Two memory ranges can be specified for channels A and B The read write or read write cycle can be selected as the bus cycle for trace acquisition Setting Method i Select the Channel A and Channel B check boxes in the AUD function group box of the Trace mode page Each channel will become valid i...

Page 28: ... bus cycle generated by the CPU or DMA is acquired A bus cycle is not acquired when the cache has been hit The address information acquired by the I bus is 28 bits and the upper 4 bits are displayed as The source cannot be displayed in the Trace window When U RAM is accessed from the P0 space the I bus must be selected and when accessed from the P2 space the L bus must be selected When a cache fil...

Page 29: ...er 24 bits the lower 8 bits are output If it matches the upper 28 bits the lower 4 bits are output The emulator regenerates the 32 bit address from these differences and displays it in the Trace window If the emulator cannot display the 32 bit address it displays the difference from the previously displayed 32 bit address 3 If the 32 bit address cannot be displayed the source line is not displayed...

Page 30: ... Clock TCK and AUD Clock AUDCK The JTAG clock TCK and AUD clock AUDCK which can be set in the Configuration window have notes as follows Set the JTAG clock TCK frequency to less than the frequency of the SH7630 peripheral module clock CKP Set the AUD clock AUDCK frequency 50 MHz or below for PCMCIA and PCI cards 2 2 5 Notes on Setting the Breakpoint Dialog Box 1 When an odd address is set the next...

Page 31: ...hen an instruction to which a BREAKPOINT has been set is executed Accordingly do not set a BREAKPOINT to an instruction which satisfies Break Condition 2 3 When a Break Condition is satisfied emulation may stop after two or more instructions have been executed 4 If a PC break address condition is set to the slot instruction after a delayed branch instruction user program execution cannot be termin...

Page 32: ...Performance Analysis dialog box is displayed by selecting Setting Note For the command line syntax refer to the online help Specifying the measurement start end conditions The measurement start end conditions are specified in Mode in the Performance Analysis dialog box Three conditions can be set as shown in table 2 9 Table 2 9 Conditions Specified in Mode Item Description Normal break Measurement...

Page 33: ...3 From the satisfaction of the condition set in Break Condition 2 to the satisfaction of the condition set in Break Condition 1 When Break condition 2 1 is selected for Mode In the second and third ranges PA 1 start point and PA 1 end point are displayed on the Action part in the Break condition sheet of the Event window For measurement errors The measured value includes errors Error will occur be...

Page 34: ...e Measurement item does not have specification Please set up a measurement item will be displayed When no item is specified for the PERFORMANCE_SET command the settings of Break condition 1 2 or Break condition 2 1 will be an error Measurement item Items are measured with Channel 1 to 4 in the Performance Analysis dialog box Maximum four conditions can be specified at the same time Table 2 10 show...

Page 35: ...ing the MMU function can only be measured Interrupt counts INT Number of BL 1 instructions BL1 Number of MD 1 instructions MD1 Instruction cache miss counts IC Data cache miss counts DC Instruction fetch stall IF Data access stall DA Instruction cache miss stall ICS Data cache miss stall DCS Cacheable access stall CS X Y RAM access stall XYS Devices incorporating the X Y memory can only be measure...

Page 36: ...cessing the cacheable and U memory areas is counted more than the actual number of cycles and counts Branch count The counter value is incremented by 2 This means that two cycles are valid for one branch Notes 1 In the non realtime trace mode of the AUD trace normal counting cannot be performed because the generation state of the stall or the execution cycle is changed 2 Since the clock source of ...

Page 37: ... the SH7630 E10A Emulator Publication Date Rev 1 00 July 3 2003 Published by Sales Strategic Planning Div Renesas Technology Corp Edited by Technical Documentation Information Department Renesas Kodaira Semiconductor Co Ltd 2003 Renesas Technology Corp All rights reserved Printed in Japan ...

Page 38: ...1753 Shimonumabe Nakahara ku Kawasaki shi Kanagawa 211 8668 Japan SuperH Family E10A Emulator REJ10B0015 0100H Additional Document for User s Manual ...

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