CHAPTER 6 CLOCK GENERATOR
Page 114 of 920
6.3.7
Subsystem clock supply mode control register (OSMC)
This register is used to reduce power consumption by stopping unnecessary clock functions.
If the RTCLPC bit is set to 1, power consumption can be reduced, because clock supply to the peripheral
functions, except the real-time clock and 12-bit interval timer, is stopped in STOP mode or HALT mode while
subsystem clock is selected as CPU clock.
In addition, the OSMC register can be used to select the operation clock of the real-time clock and 12-bit interval
timer.
The OSMC register can be set by an 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 6 - 11 Format of Subsystem clock supply mode control register (OSMC)
Address: F00F3H
After reset: 00H
Symbol
7
6
5
4
3
2
1
0
RTCLPC
0
0
WUTMMCK0
0
0
0
0
Setting in STOP mode or HALT mode while subsystem clock is selected as CPU clock
0
Enables supply of subsystem clock to peripheral functions
(See
for peripheral functions whose operations are enabled.)
1
Stops supply of subsystem clock to peripheral functions other than real-time clock and 12-bit interval
timer.
Selection of operation clock for real-time clock, 12-bit interval timer, and timer RJ
0
• The subsystem clock is selected as the operation clock for the real-time clock and the 12-bit interval
timer.
The low-speed on-chip oscillator cannot be selected as the count source for timer RJ.
1
• The low-speed on-chip oscillator clock is selected as the operation clock for the real-time clock and the
12-bit interval timer.
•Either the low-speed on-chip oscillator or the subsystem clock can be selected as the count source for
timer RJ.
Summary of Contents for RL78/G1H
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