![Renesas R8C series Hardware Manual Download Page 43](http://html1.mh-extra.com/html/renesas/r8c-series/r8c-series_hardware-manual_1440345043.webp)
R8C/18 Group, R8C/19 Group
6. Programmable I/O Ports
Rev.1.30
Apr 14, 2006
Page 28 of 233
REJ09B0222-0130
6.
Programmable I/O Ports
There are 13 programmable Input/Output ports (I/O ports) P1, P3_3 to P3_5, P3_7, and P4_5. P4_2 can be
used as an input-only port. Also, P4_6 and P4_7 can be used as input-only ports if the main clock oscillation
circuit is not used. Table 6.1 lists an Overview of Programmable I/O Ports.
NOTES:
1. In input mode, whether an internal pull-up resistor is connected or not can be selected by registers PUR0 and
PUR1.
2. These ports can be used as the LED drive port by setting the DRR register to 1 (high).
3. When the main clock oscillation circuit is not used, P4_6 and P4_7 can be used as input-only ports.
6.1
Functions of Programmable I/O Ports
The PDi_j (j=0 to 7) bit in the PDi (i=1, 3, and 4) register controls I/O of ports P1, P3_3 to P3_5, P3_7,
and P4_5. The Pi register consists of a port latch to hold output data and a circuit to read pin states.
Figures 6.1 to 6.3 show the Configurations of Programmable I/O Ports.
Table 6.2 lists the Functions of Programmable I/O Ports. Also, Figure 6.5 shows Registers PD1, PD3,
and PD4. Figure 6.6 shows Registers P1, P3, and P4, Figure 6.7 shows Registers PUR0 and PUR1, and
Figure 6.8 shows the DRR Register.
NOTE:
1. Nothing is assigned to bits PD3_0 to PD3_2, PD3_6, PD4_0 to PD4_4, PD4_6, and PD4_7.
6.2
Effect on Peripheral Functions
Programmable I/O ports function as I/O ports for peripheral functions (Refer to
Information by Pin Number of PLSP0020JB-A, PRDP0020BA-A packages
). Table 6.3 lists the
Settings of PDi_j Bit when Functioning as I/O Ports for Peripheral Functions. Refer to the description of
each function for information on how to set peripheral functions.
6.3
Pins Other than Programmable I/O Ports
Figure 6.4 shows the Configuration of I/O Pins.
Table 6.1
Overview of Programmable I/O Ports
Ports
I/O
Type of Output
I/O Setting
Internal Pull-Up
Resistor
Drive Capacity
Selection
P1
I/O
CMOS3 State
Set per bit
Set every 4 bits
Set every bit
of P1_0
to P1_3
P3_3, P4_5
I/O
CMOS3 State
Set per bit
Set every bit
None
P3_4, P3_5, P3_7
I/O
CMOS3 State
Set per bit
Set every 3 bits
None
P4_2, P4_6, P4_7
I
(No output function)
None
None
None
Table 6.2
Functions of Programmable I/O Ports
Operation when
Accessing
Pi Register
Value of PDi_j Bit in PDi Register
When PDi_j Bit is Set to 0 (Input Mode)
When PDi_j Bit is Set to 1 (Output Mode)
Reading
Read pin input level
Read the port latch
Writing
Write to the port latch
Write to the port latch. The value written to the
port latch is output from the pin.
Table 6.3
Settings of PDi_j Bit when Functioning as I/O Ports for Peripheral Functions
I/O of Peripheral Functions
PPDi_j Bit Settings for Shared Pin Functions
Input
Set this bit to 0 (input mode).
Output
This bit can be set to either 0 or 1 (output regardless of the port setting).