R8C/34K Group
USB Host Evaluation Board R0K5R8C34DK2HBR
Hardware Instruction Manual
R01AN0649EJ0110 Rev.1.10
Page 19 of 26
Jul 21, 2011
7.8
Test Pins on the board
In order to connect external devices and enable MCU functions, test pins from MCU ports are grouped on the lower left
area of the evaluation board, as shown in Figure 14
and
. Test Pin (TP) No.
and corresponding port functions
are listed in
A protection circuit is mounted on the board for the A/D input pins (AN0, AN1) and a pull-up resistor is mounted on
the board for INT (TP4), PULSE (TP3), SSO(TP17), SCS(TP18), SSCLK(TP19) and SSI(TP20) pins. For details on
how to use each MCU peripheral function, refer to the R8C/34U Group, R8C/34K Group User’s Manual: Hardware.
When you connect the external device to this product through test pins, be careful not to short signal
lines or between power line and ground. If this product is revised by the user, operation cannot be
guaranteed.
Table 9
Relation between Test Pin No. and the MCU I/O Port No
TP No.
(Pin Name)
Function Name (assumption)
Corresponding I/O Port
Number
TP17(SSO) SSO(SSU)/SDA(I
2
C) P37
TP18(SCS) SCS(SSU)
P33
TP19(SSCLK) SSCK
(SSU)/SCL(I
2
C) P35
TP20(SSI) SSI
(SSU)
P34
TP6(AN0) AN8
(A/D)
P10
TP7(AN1) AN9
(A/D)
P11
TP8(PWM0) TRCIOB
(timer)
P05
TP10(PWM1) TRCIOD
(timer)
P06
TP3(PULSE) TRAIO
(timer)
P17
TP4(INT)
INT0
(Interrupt)
P45
TP14 (-)
-
P80
TP15
(-)
-
P60
TP16
(-)
-
P44
TP21
(-)
-
P43
TP22
(-)
-
P04
TP36
(-)
-
P82
Figure 14 Test pins from MCU port on the board (1)
Figure 15 Test pins from MCU port on the board (2)
Summary of Contents for R0K5R8C34DK2HBR
Page 25: ...Appendix2 Parts Layout Diagram 1 Front Surface ...
Page 26: ...2 Rear Surface ...