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P9235A-RB Layout Guide 

© 2019 Integrated Device Technology, Inc. 

March 19, 2019 

Contents

 

1.

Introduction ...................................................................................................................................................................................................2

 

Key Points for Optimal Layout .............................................................................................................................................................2

 

2.

Tx Power Circuits .........................................................................................................................................................................................3

 

Resonance Capacitors ........................................................................................................................................................................8

 

VCC5V V

IN

, VCC5V, LDO33, LDO18, VBRG_IN, PE Circuit and DRV_VIN Pin Capacitors ...............................................................9

 

Sensitive Circuits ...............................................................................................................................................................................10

 

Boost Capacitors and Gate Drive Lines.............................................................................................................................................11

 

5V Step Down Switching Regulator ...................................................................................................................................................12

 

Flash Circuit .......................................................................................................................................................................................13

 

3.

PCB Footprint Design .................................................................................................................................................................................14

 

4.

Audible Noise Suppression ........................................................................................................................................................................15

 

5.

Schematics, Bill of Materials (BOM), and Board Layout .............................................................................................................................16

 

6.

Revision History ..........................................................................................................................................................................................22

 

List of Figures 

Figure 1.

 

Schematic with Main Power Path (Orange) and Main (Noisy) AC Power Loops (Red) .......................................................................3

 

Figure 2.

 

Recommended Orientation for the P9235A-RB and Generic Placement Guide for Select Critical Components ................................4

 

Figure 3.

 

Actual Placement for the P9235A-RB EVK. Select Critical Components are circled in Yellow ...........................................................5

 

Figure 4.

 

P9235A-RB Physical Layout from P9235A-RB-EVK Evaluation Board (2nd Layer (L1)) ....................................................................6

 

Figure 5.

 

P9235A-RB Physical Layout from P9235A-RB-EVK Evaluation Board (3rd Layer (L2)) .....................................................................6

 

Figure 6.

 

P9235A-RB Physical Layout from Demo PCB of Bottom Layer ..........................................................................................................7

 

Figure 7.

 

Resonance Capacitors ........................................................................................................................................................................8

 

Figure 8.

 

V

IN

, VCC5V, LDO33, LDO18, VBRG_IN, and DRV_VIN Pin Capacitors Placed Close to  P9235A-RB with 0.1µF Placed Closest ..9

 

Figure 9.

 

P9235A-RB Typical GND Noise Areas and Sensitive Circuit Placement ..........................................................................................10

 

Figure 10.

 

Boost Capacitors and Gate Drive Lines.............................................................................................................................................11

 

Figure 11.

 

5V Step Down Switching Regulator ...................................................................................................................................................12

 

Figure 12.

 

Flash Circuit .......................................................................................................................................................................................13

 

Figure 13.

 

P9235A-RB Recommended PCB Land Pattern Drawing ..................................................................................................................14

 

Figure 14.

 

Application Schematic .......................................................................................................................................................................16

 

Figure 15.

 

Silkscreen – Top of Board .................................................................................................................................................................19

 

Figure 16.

 

Copper – Top Layer ...........................................................................................................................................................................19

 

Figure 17.

 

Copper L1 Layer ................................................................................................................................................................................20

 

Figure 18.

 

Copper L2 Layer ................................................................................................................................................................................20

 

Figure 19.

 

Copper Bottom ..................................................................................................................................................................................21

 

Summary of Contents for P9235A-RB

Page 1: ...tual Placement for the P9235A RB EVK Select Critical Components are circled in Yellow 5 Figure 4 P9235A RB Physical Layout from P9235A RB EVK Evaluation Board 2nd Layer L1 6 Figure 5 P9235A RB Physica...

Page 2: ...UITS NON H BRIDGE POWER STAGE CIN CBOOST Place all IC pin input voltage capacitors and boost capacitors close to their related pins VIN LDO33 LDO18 VDDIO BST_BRG1 BST_BRG2 DRV_ VIN VBRG_IN Buck Regula...

Page 3: ...main power circuit of the P9235A RB device includes the current sense resistor the four FETs of the H bridge resonant tank driver and the resonant tank Secondary power circuits are the VCC5V LDO33 an...

Page 4: ...s possible taking into consideration the mechanical requirements of the system under design Determine its orientation based on the ability to route connections and place the required components in the...

Page 5: ...15 Tight small AC loops of FETs in relation to the LC tank notes 9 12 Tight loops of the FETs in relation to the H bridge Cin capacitors notes 9 10 Closeness of current and voltage demodulation to the...

Page 6: ...ntact to GND plane 10mil vias for thermal transfer The ground layer L1 is between the top layer signal plane and layer 3 second middle layer L2 gate drive signal layer below Figure 5 P9235A RB Physica...

Page 7: ...ient air or other objects Spreading the heat into internal layers is also effective for lowering the operating temperature Internal layers can effectively spread heat horizontally when they are not in...

Page 8: ...9235A RB to the Tx coil C0G capacitors will offer the highest performance and are recommended X7R and X5R can be substituted but low ESR components should be used Since all the load current and the cu...

Page 9: ...capacitor is recommended to be placed as close as possible to GND from the VIN VCC5V and DRV_VIN nodes A 1 F decoupling capacitor is recommended for LDO33 and LDO18 regulated output pins A 0 1 F capac...

Page 10: ...sonance nodes generate the highest harmonic noise which must be filtered with decoupling capacitor Place the current sense circuitry the voltage demodulation circuitry and the current demodulation cir...

Page 11: ...f the capacitive energies Place the gate driver resistors R35 R40 R44 R47 close to their respective pins This limits the switching noise generated Place the FET gate bleed resistors R36 R42 R45 R48 cl...

Page 12: ...or close to the switch node This is only after placing all CIN capacitors as close to their respective pins as possible Make the L COUT loop small to limit the loop inductance and related noise Place...

Page 13: ...nto the flash When P9235A RB works it will fetch the instructions or data from flash frequently Therefore for keeping signal integrity and minimize the EMI it s recommended that 1 the trace of SS SCLK...

Page 14: ...RB Layout Guide 2019 Integrated Device Technology Inc 14 March 19 2019 3 PCB Footprint Design The P9235A RB package is a fine pitch 40 VFQFN device Figure 13 P9235A RB Recommended PCB Land Pattern Dr...

Page 15: ...zoelectric effect of ceramic capacitors The capacitors constrict and expand while providing the communication pulses and this noise is amplified as it flexes the PCB The primary solution to this issue...

Page 16: ...10V 0402 GND_SEL SDA C42 10uF 10V 0603 C21 22nF 16V 0402 C46 0 1uF 10V 0402 C47 100nF 50V 1206 FOD_ADJ C19 5 6nF 25V 0603 C67 0 1uF 10V 0402 SDA MOSI P9235A RB U3 EN 1 GND 2 PREG 3 VIN 4 SW_S 5 GND1 6...

Page 17: ...100nF CAP CER 0 1 F 50V C0G NP0 1206 GRM31C5C1H104JA01L 1206 11 2 C50 C53 1 F CAP CER 1 F 6 3V X5R 0603 GRM188R61A105KA61D 603 12 1 D2 BAV21 WS DIODE GEN PURP 200V 200MA SOD323 BAV21WS 7 F SOD 323 13...

Page 18: ...RES SMD 0 JUMPER 1 16W 0402 RC0402JR 070RP 402 30 2 R41 R43 1K RES SMD 1k 5 1 16W 0402 RC0402JR 071KL 402 31 1 R46 680 RES SMD 680 5 1 16W 0402 RC0402JR 07680RL 402 32 2 R50 R52 5 1k RES SMD 5 1k 5 1...

Page 19: ...P9235A RB Layout Guide 2019 Integrated Device Technology Inc 19 March 19 2019 Figure 15 Silkscreen Top of Board Figure 16 Copper Top Layer...

Page 20: ...P9235A RB Layout Guide 2019 Integrated Device Technology Inc 20 March 19 2019 Figure 17 Copper L1 Layer Figure 18 Copper L2 Layer...

Page 21: ...P9235A RB Layout Guide 2019 Integrated Device Technology Inc 21 March 19 2019 Figure 19 Copper Bottom...

Page 22: ...the suitability of IDT s products for any particular purpose an implied warranty of merchantability or non infringement of the intellectual property rights of others This document is presented only a...

Page 23: ...e intended for developers skilled in the art designing with Renesas products You are solely responsible for 1 selecting the appropriate products for your application 2 designing validating and testing...

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