E1/E20/E2/E2 Lite Additional Document
R20UT1994EJ0900 Rev.9.00
Page 54 of 58
Jan.20.22
3.10.14 Points for Caution on Using the RL78/F24
3.10.14.1
Specify RAM area size
In RL78/F24, RAMSAR register is added to specify the size of the RAM area that can be used.
With the initial value of this register, only 4KB(0xFEF00 or later) can be used for the RAM area. If you want
to use over 4KB, set the value of the RAMSAR register in the program.
The value of this register can be rewritten only once after reset.
3.10.14.2
Caution about writing of security ID
In RL78/F24, if you rewrite OCD security ID(0xC6-0xD5) on memory panel, ID authentication of debugger
fails and the program stops even if it is executed.
If you rewrite OCD security ID in memory panel, perform CPU reset in order to perform ID authentication
again with the debugger.
3.10.14.3
Caution about debugging program that causes internal reset
In debugging with internal reset enabled on RL78/F24, in the case of a user program that causes internal
reset immediately after execution due to illegal memory access etc., if a forced break is performed after the
execution starts, it will break at address 0xF08C0.
Please take one of following ways.
(a) To avoid the internal reset, select "Yes" in the [Mask INTERNAL RESET signal] property of the
debugger.
(b) Modify the cause the reset in the program.
3.10.14.4
Caution of Security option byte
In RL78/F24, if bit4 of security option byte(0xC4) is set to "0", on-chip debugging is not possible.
And on this condition, if set on-chip debug option byte(0xC3) to on-chip debugging
prohibited(OCDENSET=0), this chip can't debug anymore.
If bit4 of security option byte is "0" and on-chip debugging is enabled, you can enable on-chip debugging by
setting "Erase Flash ROM When Starting" to "Yes" and erasing the entire flash area.
Figure 3-8 Flash ROM erase setting at startup
