Renesas IDT 89HPES12T3G2, User Manual

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IDT SMBus Interfaces
PES12T3G2 User Manual 5 - 7 January 28, 2013
Notes
Outputs for ports that are disabled or are not implemented in that configuration or bond option, are set to
their negated value (e.g., the power indicator is turned off, the link is down, there is no activity, etc.). The
default value of I/O expander outputs is shown in Table 5.5. Note that this default value may be modified via
serial EEPROM or SMBus configuration prior to SMBus initialization by changing the state of the PCI
Express Slot Control Register (PCIESCTL) or Hot-Plug Configuration Control (HPCFGCTL).
The following I/O expander configuration sequence is issued by the PES12T3G2 to I/O expander zero
(i.e., the one that contains hot-plug signals).
– Write the default value of the outputs bits on the lower eight I/O expander pins (i.e., I/O-0.0 through
I/O-0.7) to I/O expander register 2.
– Write the default value of the outputs bits on the upper eight I/O expander pins (i.e., I/O-1.0
through I/O-1.7) to I/O expander register 3.
– Write value 0x0 to I/O expander register 4 (no inversion in IO-0)
– Write value 0x0 to I/O expander register 5 (no inversion in IO-1)
– Write the configuration value to select inputs/outputs in the lower eight I/O expander bits (i.e., I/O-
0.0 through I/O-0.7) to I/O expander register 6.
– Write the configuration value to select inputs/outputs in the upper eight I/O expander bits (i.e., I/
O-1.0 through I/O-1.7) to I/O expander register 7.
– Read value of I/O expander register 0 to obtain the current state of the lower eight I/O expander
bits (i.e., I/O-0.0 through I/O-0.7)
– Read value of I/O expander register 1 to obtain the current state of the upper eight I/O expander
bits (i.e., I/O-1.0 through I/O-1.7)
The following I/O expander configuration sequence is issued by the PES12T3G2 to I/O expander two
(i.e., the one that contain hot-plug signals and power good inputs).
– Write the default value of the outputs bits on the lower eight I/O expander pins (i.e., I/O-0.0 through
I/O-0.7) to I/O expander register 2.
– Write value 0x0 to I/O expander register 4 (no inversion in IO-0)
– Write value 0x0 to I/O expander register 5 (no inversion in IO-1)
– Write the configuration value to select inputs/outputs in the lower eight I/O expander bits (i.e., I/O-
0.0 through I/O-0.7) to I/O expander register 6.
– Write the configuration value to select all inputs upper eight I/O expander bits (i.e., I/O-1.0 through
I/O-1.7) to I/O expander register 7.
– Read value of I/O expander register 0 to obtain the current state of the lower eight I/O expander
bits (i.e., I/O-0.0 through I/O-0.7)
– Read value of I/O expander register 1 to obtain the current state of the upper eight I/O expander
bits (i.e., I/O-1.0 through I/O-1.7)
SMBus I/O
Expander
Bit
Signal Description
Default
Value
(I/O-x.4) P2AIN Attention indicator output (off) 1
(I/O-x.5) P2PIN Power indicator output (on) 0
(I/O-x.6) P2PEP Power enable output (on) 1
(I/O-x.7) P2ILOCKP Electromechanical interlock (negated - off) 0
Table 5.5 I/O Expander Default Output Signal Value