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FemtoClock®2 GUI User Guide

R31US0004EU0100 Rev.1.0
Apr 22, 2021

Page 12

8.3

APLL Block

Clicking on the

APLL

block allows users to configure the input mux, charge pump settings, and internal low pass

filter settings. Users can also change the VCO frequency and LDO voltage from here.

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Summary of Contents for FemtoClock 2

Page 1: ...etup 4 3 1 Inputs 5 3 2 DPLL 6 3 3 Outputs 7 4 Side Panel Buttons 8 5 Control Panel View 8 6 Configuration View 9 7 Register View 10 8 Block Diagram View 10 8 1 OSC Block 11 8 2 Inputs Block 11 8 3 AP...

Page 2: ...installs to a computer that already has the Renesas IC Toolbox software The FemtoClock2 installer can be located on the FemtoClock 2 Evaluation Kit page Always check for newer versions as new features...

Page 3: ...g a Settings File Loading a settings file is similar to creating a new one To load an existing settings file click on the Browse button just after opening the Renesas IC Toolbox software This will tak...

Page 4: ...d pages Inputs DPLL and Outputs Each section pertains to a different portion of the device that needs to be configured for proper functionality Note Some FemtoClock2 devices may not have a DPLL Users...

Page 5: ...he XIN pin or in any Jitter Attenuator mode The same applies for the CLKIN section Device mode is through the Operation Mode dropdown menu Device modes include Synthesizer Jitter Attenuator and DCO De...

Page 6: ...L section will become available The DPLL section allows users to manually adjust bandwidth decimator gain peaking and phase slope limit values Alternatively the user can select a predefined SyncE prof...

Page 7: ...uts section allows users to set output frequencies and adjust the overall VCO frequency Outputs can be further configured by clicking on the symbol next to the output field This will give the user the...

Page 8: ...the device overview Wizard button takes the user back to the initial wizard Configuration button displays the register settings in a readable text format with a search engine Registers button shows a...

Page 9: ...hrough register settings via the tabs at the top of the page Each section has all of the critical registers and data fields listed to allow the user to configure the device block The search tab gives...

Page 10: ...right They can either be adjusted by writing directly to the diagram or entering values into the data fields on the right 8 Block Diagram View The block diagram view reflects the datasheet representa...

Page 11: ...8 1 OSC Block Clicking on the OSC block gives access to the settings that configure the Xin frequency and internal tuning capacitors 8 2 Inputs Block Clicking on the Inputs block allows the control of...

Page 12: ...0100 Rev 1 0 Apr 22 2021 Page 12 8 3 APLL Block Clicking on the APLL block allows users to configure the input mux charge pump settings and internal low pass filter settings Users can also change the...

Page 13: ...ce operation mode is set to Jitter Attenuator This block contains all features pertaining to the DPLL Clicking on the DPLL block allows the user to enable reveritive or hitless switching adjust the ph...

Page 14: ...ck 2 GUI User Guide R31US0004EU0100 Rev 1 0 Apr 22 2021 Page 14 8 5 Outputs Block Each output can be configured on the main block diagram However to reach more adjustable settings click on the advance...

Page 15: ...Page 15 8 6 Device Info The Device Info button opens a window that contains the Vendor ID Device ID Rev ID and Dash Code 8 7 GPIO Block Clicking on the GPIO block allows users to configure the output...

Page 16: ...in the corner of the page to establish a connection to the device See the Evaluation Board User Manual for more information regarding device connection This manual is located on the FemtoClock 2 Evalu...

Page 17: ...r the configuration view 2 Type I2C into the search bar 3 Change the TOP SSI I2C_ADDR_CNFG i2c_addr setting to the desired address 11 2 Disabling the Internal Input and Output Terminations 11 2 1 Disa...

Page 18: ...view 2 Click the advanced button under the desired output 3 Enable the HCSL terminations through the check box under the HCSL header 11 3 Configuring the Device for Write Frequency Mode 1 Go to the b...

Page 19: ...FemtoClock 2 GUI User Guide R31US0004EU0100 Rev 1 0 Apr 22 2021 Page 19 12 Revision History Revision Date Description 1 0 Apr 22 2021 Initial release...

Page 20: ...e intended for developers skilled in the art designing with Renesas products You are solely responsible for 1 selecting the appropriate products for your application 2 designing validating and testing...

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