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Renesas Asynchronous SH7145F, Application Note

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Renesas Asynchronous SH7145F Application Note Download Page 10

SH7145F

Asynchronous Serial Data Transmission/Reception

REJ06B0357-0100O/Rev.1.00

March 2004

Page 10 of 17

Register

Bit

Set Value

Function

SMR_1

MP

0

Multiprocessor mode (enabled in asynchronous mode only)

Multiprocessor communication disabled when 0

CKS1

CKS2

0

0

Clock select 1, 0

When value is 00, P

φ

clock selected using on-chip baud rate generator

as clock source

BRR_1

H'40

Bit rate register 1

8-bit register for adjusting bit rate

SDCR_1

H'F2

Serial direction control register 1

DIR bit (bit 3) selects LSB-first or MSB-first

In task example, DIR = 0 (LSB-first)

SSR_1

H'xx

Serial status register 1

Comprises SCI1 status flag and transmit and receive multiprocessor bits

Only 0 may be written to the status flag, to clear it

TDRE

*

Transmit data register empty (status flag)

RDRF

*

Receive data register full (status flag)

ORER

*

Overrun error (status flag)

FER

*

Framing error (status flag)

PER

*

Parity error (status flag)

TEND

*

Transmit end (status flag)

MPB

0

Multiprocessor bit

MPBT

0

Multiprocessor bit transfer

PA4MD1

PA4MD0

0

1

Port A control register L2

Function setting for port A multiplex pin (TXD1)

PACRL2

PA3MD1

PA3MD0

0

1

Port A control register L2

Function setting for port A multiplex pin (RXD1)

*

: Can only be cleared to 0. Setting to 1 is performed by hardware.

Summary of Contents for Asynchronous SH7145F

Page 1: ...scribes asynchronous serial data transmission reception using the SCI Serial Communication Interface module of the SH7145F It is intended to be used as reference by users designing software applications The program examples contained in this application note have been tested However operation should be confirmed before using them in an actual application Device for Which Operation Has Been Confirm...

Page 2: ...f serial data are received by the SH7145 and the receive data is then transmitted The communication format is 192 000 bps 8 bit one stop bit and no parity SH7145 Serial data transfer target MCU TXD RXD SCI ch1 3 3 V 3 3 V TXD RXD Figure 1 Asynchronous Serial Data Transmission Reception by SH7145 Table 1 Asynchronous Serial Data Transmission Format Format Item Setting Bit rate 19200 bps Data length...

Page 3: ...rial mode register 1 SMR_1 Serial control register 1 SCR_1 Serial status register 1 SSR_1 Serial direction control register 1 SDCR_1 Transmit receive control circuit Interrupt requests Transmit data control Transmit shift register 1 TSR_1 Transmit data register 1 TDR_1 Receive data control Receive shift register 1 RSR_1 Receive data register 1 RDR_1 External clock Pφ 128 Pφ 32 Pφ 8 Pφ1 On chip per...

Page 4: ... Register TDR_1 Data to be transmitted is stored in this 8 bit register When it is detected that TDR_1 is empty data that has been written to TDR_1 is automatically transferred to TSR_1 TDR_1 and TSR_1 are in a double buffer configuration This allows data to be transferred to TSR_1 after one frame of data has been transmitted and the next frame of data is still being written to TDR_1 making possib...

Page 5: ... function allocations for the task example Table 2 Function Allocations Function Classification Function Allocation TXD1 Pin Channel 1 transmit data output pin RXD1 Pin Channel 1 transmit data input pin SMR_1 SCI1 Sets communication format to asynchronous mode SCR_1 SCI1 Enables transmit operation SSR_1 SCI1 Status flag showing SCI1 operation status SDCR_1 SCI1 Specifies LSB first BRR_1 SCI1 Sets ...

Page 6: ...ormed 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Data bits D0 to D7 Data bits D0 to D7 1 0 TxD1 pin TDR_1 register TSR_1 register TXD1 pin TDRE SSR_1 bit RDRF SSR_1 bit Receive operation Notes 1 The start bit transmit data parity bit and stop bit are output in that order from the TxD1 pin 2 To perform continuous reception read data transferred to RDR until reception of next data is complete Transmit ...

Page 7: ...m RDR_1 4 Clear RDRF flag in SSR_1 to 0 5 Write receive data to TDR_1 6 Clear TDRE flag in SSR_1 to 1 7 Transfer data from TDR_1 to TSR_1 8 Set TDRE flag in SSR_1 to 1 and output transmit data from pin TXD1 9 RSR_1 receives serial data and transfers it to RDR_1 10 Set RDRF flag in SSR_1 to 1 11 Read data from RDR_1 12 Clear RDRF flag in SSR_1 to 0 13 Write receive data to TDR_1 14 Clear TDRE flag ...

Page 8: ...ceives serial data Transmit routine trans_sci Transmits serial data Error handling err_int Handles receive errors 2 Argument Descriptions Table 5 lists the arguments used in the task example Table 5 Argument Descriptions Argument Function Module Rev_data 0 2 Stores SCI_1 receive data Receive routine trans_data Transmits data from SCI_1 Transmit routine 3 On Chip Register Descriptions Table 6 lists...

Page 9: ...cessor interrupt enable In asynchronous mode enabled when MP 1 in SMR In the task example disabled because MP 0 TEIE 0 Transmit end interrupt enable TEI interrupt requests enabled when set to 1 CKE1 CKE2 0 0 Clock enable 1 0 Selects clock source and SCK pin function In the task example clock source is on chip clock and SCK pin is not used SMR_1 H 00 Serial mode register 1 Selects communication for...

Page 10: ...first In task example DIR 0 LSB first SSR_1 H xx Serial status register 1 Comprises SCI1 status flag and transmit and receive multiprocessor bits Only 0 may be written to the status flag to clear it TDRE Transmit data register empty status flag RDRF Receive data register full status flag ORER Overrun error status flag FER Framing error status flag PER Parity error status flag TEND Transmit end sta...

Page 11: ...ransmission Reception REJ06B0357 0100O Rev 1 00 March 2004 Page 11 of 17 5 Flowcharts 1 Main Routine main init_sci rcv_sci rcv_sci rcv_sci Initialize SCI module Receive 1st byte of data Receive 2nd byte of data Receive 3rd byte of data ...

Page 12: ... and CKE0 in SCR_0 Using SMR_1 select asynchronous mode 8 data bits no parity 1 stop bit and Pφ as baud rate generator clock source Using BRR_1 set communication speed to 19 200 bps Using DIR bit in SDCR_1 select LSB first communication Using SCR_1 enable ERI interrupt Using PACRL2 set PA3 pin 133 to RXD function and PA4 pin 134 to RXD function Set bits TE and RE in SCR_1 to 1 to enable transmit o...

Page 13: ... No Yes Read receive data from RDR_1 and store it in on chip RAM Transmit receive data without modification Clear RDRF flag in SSR_1 to 0 Wait until RDR_1 finishes receiving data RTE rcv_sci 4 Data Transfer Routine No Yes Write transmit data to TDR_1 Clear TDRE bit in SSR_1 to 0 Wait until possible to write to TDR_1 RTE trans_sci ...

Page 14: ...define h include machine h Symbol Definition define COUNT 3 Function Definition void main void void init_sci void unsigned char rcv_sci unsigned char void trans_sci char void err_int void void dummy_f void RAM allocation Definition volatile unsigned char Rev_data COUNT main Program void main void unsigned char i 0 init_sci Initialize SCI i rcv_sci i Receive 1st byte of serial data i rcv_sci i Rece...

Page 15: ... 8bits PE 0 No parity OE 0 0 even parity STOP 0 1 stop bit CKS 0 clock source Pφ 25MHz P_SCI1 BRR_1 40 19200bps 25MHz Peripheral P_SCI1 SDCR_1 BIT DIR 0 LSB first send for i 0 i 0x0300 i Wait 1bit P_SCI1 SCR_1 BIT TIE 0 TXI1 interrupt disable P_SCI1 SCR_1 BIT RIE 0 RXI1 ERI interrupt disable Initialize SCI1 PORT P_PORTA PACRL2 BIT PA4MD 1 set TXD1 PA4 134pin SH7145 P_PORTA PACRL2 BIT PA3MD 1 set R...

Page 16: ...i char tarans_data while P_SCI1 SSR_1 BYTE 0x80 Wait until data can be written to TDR until TDRE is set to 1 P_SCI1 TDR_1 unsigned char trans_data Write data to TDR P_SCI1 SSR_1 BYTE 0x7F Clear flag transmit Interrupt handling pragma interrupt err_int void err_int void if P_SCI1 SSR_1 BIT ORER 1 Overrun error P_SCI1 SSR_1 BIT ORER 0 ORER flag clear if P_SCI1 SSR_1 BIT FER 1 Framing error P_SCI1 SS...

Page 17: ... sure to evaluate all information as a total system before making a final decision on the applicability of the information and products Renesas Technology Corp assumes no responsibility for any damage liability or other loss resulting from the information contained herein 5 Renesas Technology Corp semiconductors are not designed or manufactured for use in a device or system that is used under circ...

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