Ameba-D User Manual
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Fig 9-37 Transaction request through peripheral interrupt
The peripheral can never be the flow controller, since it cannot connect to the dma_last signal. The interrupt line from the peripheral is tied to
the dma_req line, as shown in Fig 9-37. The timing of the interrupt line from the peripheral must be the same as the dma_req line
.
Since the dma_ack line is not sampled by the peripheral, the handshaking loop is as follows:
(1)
Peripheral generates an interrupt that asserts dma_req.
(2)
DMAC completes the burst transaction and generates an end-of-burst transaction interrupt, IntSrcTran/IntDstTran. Interrupts must be
enabled and the transaction complete interrupt unmasked.
(3)
The interrupt service routine clears the interrupt in the peripheral so that the dma_req is de-asserted.
Notice that dma_single is hardcoded to an inactive level.
9.2.9
Flow Control Configurations
Fig 9-38 indicates five different flow control configurations using hardware handshaking interfaces – a simplified version of the interface is
shown.
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