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Receiver Stage
The receiver uses a double frequency super-heterodyne circuit. The first Immediate Frequency (IF) is 21.4
MHz and the second is 450 kHz.
The RF signal is received by the antenna, and passes through a low-pass filter network L1, L2, L3, L9, C1,
C2, C3, C5, C6, C14, C47 and C62 to filter out unwanted signal. The received RF signal then passes
through a high RF transformer L10 and is amplified by RF amplifier Q9. L11, L12, L13, C15, C18, C20
form the band pass filter. The RF signal then is mixed with the local oscillation frequency by the mixer D22,
D23. The first IF (Immediate Frequency) 21.4 MHz is produced. This IF is passed through a coil T2 and a
pair of crystal filter F1, F2 to further filter out other unwanted signals. The first IF then is amplified by Q11
and the IF amplifier IC7. (IC7 is an integrated IF amplifier which consists of a local oscillator, a
demodulator, a second mixer, squelch control circuit, and IF amplifier). The 21.4 MHz IF then is mixed here
with second mixer and converted into 2nd Immediate Frequency (IF) 450 kHz. The 2nd IF passes through
a ceramic filter F4 to filter out the residue unwanted signal at pin 5 of IC7 output this final IF signal and The
demodulated AF signal is output at pin 9 of IC7.
The demodulated AF signal pass through IC15 then passes through a volume control VR201 through
de-emphasis circuit feeding IC10A, IC10B.and finally amplified by Audio amplifier IC11 and heard in the
speaker.
The squelch control signal also produced by IC7, the rectified noise signal is output by Pin 14 of the IC7.
Pass through the network by composition of C170, R44 are sends the digital squelch control signal to the
MCU to mute the audio speaker path and to indicate the RX station on LCD, R214, R217 and VR203 form
a variable resistor, which correspond to the squelch level.
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Local oscillator PLL (Phase Lock Loop) Circuit:
The receiver and transmitter both share the same PLL (Phase Lock Loop) Circuitry to produce the carrier
frequency or the receiver local oscillation frequency. The local oscillator consists of a fundamental
frequency oscillator Q301 and A phase Lock Loop (PLL) IC16 When Rx 5Vvoltage is supply, the VCO will
produce receiver local oscillator frequency. The high stability frequency is determined by crystal X2
(20.950 MHz) and as the PLL reference oscillator. This signal is frequency-divided by IC16 and a 12.5 kHz
signal is produced. When the VCO frequency applied to IC16 pin1 and frequency-divided by IC2 produces
a frequency comparable to 12.5 kHz, PLL IC pin 3 will output a PD voltage to control the VCO. When
these two frequencies are matched, a constant control voltage is output from PLL to lock VCO in desired
frequency. Otherwise the PLL IC pin 5 will also output a unlock indication to MCU to indicate that the PLL
is in the frequency unlock state.
