Rastergraf
3-22 Programming On-board Devices
3.10 Flash EEPROM
The Eclipse3 has a 128 KB Flash EEPROM. It can be updated in the field
using a special updater program. The code in the PROM cannot be directly
executed by the CPU. It must be read by the host CPU into its memory
and executed from there.
The Borealis accesses the PROM data through the Flash EPROM data
port. The multiplexed address bits contain both the high and low order
address lines for the PROM. The high order lines appear first and so must
be latched externally.
Although in most cases the standard BIOS PROM would be 64 KB, a 128
KB is used on the Eclipse3 in order to accommodate both Windows VGA
BIOS and SPARC FCode. See
Section 2.3.3
for more information.
3.11 Serial EEPROM
The graphics board includes an IC position for an Atmel AT24C02 (or
equivalent) 2 Kb (256 bytes) I
2
C Serial Electrically Erasable
Programmable Read Only Memory (EEPROM). The programming of the
Serial EEPROM is done through control lines on the Borealis chip.
Rastergraf reserves the first 128 bytes of the 256 byte Serial EEPROM for
internal use. The remaining 128 bytes are left for user data. The use of the
serial EEPROM on the Eclipse3 does not currently have formal Rastergraf
software support.
3.12 Interrupts
There is not a lot to say about interrupts for the Eclipse3. The Borealis
chip is connected to the INTA line. The interrupt is controlled through the
control registers in the chip itself. See
Section 2.3.2
for more comments
about Interrupts. Note that if the LM75 Temperature Sensor is installed, it
too can cause an interrupt on the INTA line.
What happens on that line at the other end (CPU side) is beyond the scope
of this manual. In most cases, the interrupts are combined with other PCI
slots, and the software will have to poll all PCI devices to see who made
the interrupt.
