R&S SGT100A, User Manual

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Annex
R&S
®
SGT100A
539 User Manual 1176.8674.02 ─ 07
●
Standard Event Status , i.e. the Event status Register (ESR) and the Event Status
Enable (ESE), see Chapter 15.1.5.4, "Event Status Register (ESR) and Event Sta-
tus Enable Register (ESE)" , on page 542.
●
Questionable Status and Operation Status , the (SCPI status registers, see
Chapter 15.1.5.2, "Structure of a SCPI Status Register" , on page 539, Chap-
ter 15.1.5.5, "Questionable Status Register (STATus:QUEStionable)" ,
on page 543 and Chapter 15.1.5.6, "Operation Status Register (STATus:OPERa-
tion)" , on page 543.
●
Output-Queue
The output queue contains the messages the instrument returns to the controller. It
is not part of the status reporting system but determines the value of the
MAV
bit in
the
STB
and thus is represented in the overview.
●
Error- /Event-Queue
The error-/event-queue contains all errors and events that have occurred in the
past. When reading the queue, the instrument starts with the first occurred error/
event.
All status registers have the same internal structure.
SRE, ESE
The service request enable register
SRE
can be used as
ENABle
part of the
STB
if the
STB
is structured according to SCPI. By analogy, the
ESE
can be used as the
ENABle
part of the
ESR.
15.1.5.2 Structure of a SCPI Status Register
Each standard SCPI register consists of 5 parts. Each part has a width of 16 bits and
has different functions. The individual bits are independent of each other, i.e. each
hardware status is assigned a bit number which is valid for all five parts. Bit 15 (the
most significant bit) is set to zero for all parts. Thus the contents of the register parts
can be processed by the controller as positive integers.
Remote Control Basics